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Add extra field to gtm_jmpbuf on x86 only

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Expand the gtm_jmpbuf structure by one word field to add
Intel CET support further. The code in sjlj.S already
allocates more space on the stack then gtm_jmpbuf needs.
Use this extra space to absorb the new field.

The structure is allocated on the stack in such a way
that eip/rsp field is overlapped with return address on
the stack. Locate the new field right before eip/rsp so
code that accesses buffer fields relative to address of
gtm_jmpbuf has its offsets unchanged.

	* libitm/config/x86/target.h: Add new field (ssp).
	* libitm/config/x86/sjlj.S: Change offsets.

From-SVN: r254907
This commit is contained in:
Igor Tsimbalist 2017-11-17 23:57:07 +01:00 committed by Igor Tsimbalist
parent 7cac54fb0d
commit cc03e55b5a
3 changed files with 32 additions and 21 deletions
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5
libitm/ChangeLog
View File

@ -1,3 +1,8 @@
2017-11-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* libitm/config/x86/target.h: Add new field (ssp).
* libitm/config/x86/sjlj.S: Change offsets.
2017-05-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* testsuite/lib/libitm.exp: Load scanlang.exp.

46
libitm/config/x86/sjlj.S
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@ -126,20 +126,22 @@ SYM(_ITM_beginTransaction):
/* Store edi for future HTM fast path retries. We use a stack slot
lower than the jmpbuf so that the jmpbuf's rip field will overlap
with the proper return address on the stack. */
movl %edi, 8(%rsp)
movl %edi, (%rsp)
/* Save the jmpbuf for any non-HTM-fastpath execution method.
Because rsp-based addressing is 1 byte larger and we've got rax
handy, use it. */
movq %rax, -64(%rax)
movq %rbx, -56(%rax)
movq %rbp, -48(%rax)
movq %r12, -40(%rax)
movq %r13, -32(%rax)
movq %r14, -24(%rax)
movq %r15, -16(%rax)
leaq -64(%rax), %rsi
movq %rax, -72(%rax)
movq %rbx, -64(%rax)
movq %rbp, -56(%rax)
movq %r12, -48(%rax)
movq %r13, -40(%rax)
movq %r14, -32(%rax)
movq %r15, -24(%rax)
xorq %rdx, %rdx
movq %rdx, -16(%rax)
leaq -72(%rax), %rsi
call SYM(GTM_begin_transaction)
movl 8(%rsp), %edi
movl (%rsp), %edi
addq $72, %rsp
cfi_adjust_cfa_offset(-72)
#ifdef HAVE_AS_RTM
@ -162,12 +164,14 @@ SYM(_ITM_beginTransaction):
movl 4(%esp), %eax
subl $28, %esp
cfi_def_cfa_offset(32)
movl %ecx, 8(%esp)
movl %ebx, 12(%esp)
movl %esi, 16(%esp)
movl %edi, 20(%esp)
movl %ebp, 24(%esp)
leal 8(%esp), %edx
movl %ecx, 4(%esp)
movl %ebx, 8(%esp)
movl %esi, 12(%esp)
movl %edi, 16(%esp)
movl %ebp, 20(%esp)
xorl %edx, %edx
movl %edx, 24(%esp)
leal 4(%esp), %edx
#if defined HAVE_ATTRIBUTE_VISIBILITY || !defined __PIC__
call SYM(GTM_begin_transaction)
#elif defined __ELF__
@ -175,7 +179,7 @@ SYM(_ITM_beginTransaction):
1: popl %ebx
addl $_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx
call SYM(GTM_begin_transaction)@PLT
movl 12(%esp), %ebx
movl 8(%esp), %ebx
#else
# error "Unsupported PIC sequence"
#endif
@ -203,10 +207,10 @@ SYM(GTM_longjmp):
movq 48(%rsi), %r15
movl %edi, %eax
cfi_def_cfa(%rsi, 0)
cfi_offset(%rip, 56)
cfi_offset(%rip, 64)
cfi_register(%rsp, %rcx)
movq %rcx, %rsp
jmp *56(%rsi)
jmp *64(%rsi)
#else
movl (%edx), %ecx
movl 4(%edx), %ebx
@ -214,10 +218,10 @@ SYM(GTM_longjmp):
movl 12(%edx), %edi
movl 16(%edx), %ebp
cfi_def_cfa(%edx, 0)
cfi_offset(%eip, 20)
cfi_offset(%eip, 24)
cfi_register(%esp, %ecx)
movl %ecx, %esp
jmp *20(%edx)
jmp *24(%edx)
#endif
cfi_endproc

2
libitm/config/x86/target.h
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@ -39,12 +39,14 @@ typedef struct gtm_jmpbuf
unsigned long long r13;
unsigned long long r14;
unsigned long long r15;
unsigned long long ssp;
unsigned long long rip;
#else
unsigned long ebx;
unsigned long esi;
unsigned long edi;
unsigned long ebp;
unsigned long ssp;
unsigned long eip;
#endif
} gtm_jmpbuf;