rs6000.c (expand_block_move): DImode loads and stores require word-aligned displacements.
* rs6000.c (expand_block_move): DImode loads and stores require word-aligned displacements. Increment address registers with adddi3 on 64-bit platform. Use TARGET_POWERPC64 not TARGET_64BIT. From-SVN: r29606
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@ -1,3 +1,9 @@
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Wed Sep 22 17:55:31 1999 David Edelsohn <edelsohn@gnu.org>
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* rs6000.c (expand_block_move): DImode loads and stores require
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word-aligned displacements. Increment address registers with
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adddi3 on 64-bit platform. Use TARGET_POWERPC64 not TARGET_64BIT.
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Wed Sep 22 17:35:55 1999 Michael Meissner <meissner@cygnus.com>
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* dwarf2out.c (base_type_die): Use the name __unknown__ if there
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@ -2073,7 +2073,7 @@ expand_block_move (operands)
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int move_bytes;
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/* If this is not a fixed size move, just call memcpy */
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if (!constp)
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if (! constp)
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return 0;
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/* Anything to move? */
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@ -2088,7 +2088,7 @@ expand_block_move (operands)
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if (bytes > 4*8)
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return 0;
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}
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else if (!STRICT_ALIGNMENT)
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else if (! STRICT_ALIGNMENT)
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{
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if (bytes > 4*8)
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return 0;
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@ -2105,89 +2105,134 @@ expand_block_move (operands)
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for ( ; bytes > 0; bytes -= move_bytes)
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{
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if (bytes > 24 /* move up to 32 bytes at a time */
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&& !fixed_regs[5]
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&& !fixed_regs[6]
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&& !fixed_regs[7]
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&& !fixed_regs[8]
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&& !fixed_regs[9]
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&& !fixed_regs[10]
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&& !fixed_regs[11]
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&& !fixed_regs[12])
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&& ! fixed_regs[5]
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&& ! fixed_regs[6]
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&& ! fixed_regs[7]
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&& ! fixed_regs[8]
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&& ! fixed_regs[9]
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&& ! fixed_regs[10]
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&& ! fixed_regs[11]
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&& ! fixed_regs[12])
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{
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move_bytes = (bytes > 32) ? 32 : bytes;
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emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
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expand_block_move_mem (BLKmode, src_reg, orig_src),
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GEN_INT ((move_bytes == 32) ? 0 : move_bytes),
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emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode,
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dest_reg,
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orig_dest),
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expand_block_move_mem (BLKmode,
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src_reg,
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orig_src),
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GEN_INT ((move_bytes == 32)
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? 0 : move_bytes),
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align_rtx));
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}
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else if (bytes > 16 /* move up to 24 bytes at a time */
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&& !fixed_regs[7]
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&& !fixed_regs[8]
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&& !fixed_regs[9]
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&& !fixed_regs[10]
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&& !fixed_regs[11]
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&& !fixed_regs[12])
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&& ! fixed_regs[7]
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&& ! fixed_regs[8]
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&& ! fixed_regs[9]
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&& ! fixed_regs[10]
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&& ! fixed_regs[11]
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&& ! fixed_regs[12])
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{
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move_bytes = (bytes > 24) ? 24 : bytes;
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emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
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expand_block_move_mem (BLKmode, src_reg, orig_src),
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emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode,
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dest_reg,
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orig_dest),
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expand_block_move_mem (BLKmode,
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src_reg,
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orig_src),
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GEN_INT (move_bytes),
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align_rtx));
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}
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else if (bytes > 8 /* move up to 16 bytes at a time */
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&& !fixed_regs[9]
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&& !fixed_regs[10]
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&& !fixed_regs[11]
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&& !fixed_regs[12])
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&& ! fixed_regs[9]
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&& ! fixed_regs[10]
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&& ! fixed_regs[11]
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&& ! fixed_regs[12])
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{
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move_bytes = (bytes > 16) ? 16 : bytes;
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emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
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expand_block_move_mem (BLKmode, src_reg, orig_src),
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emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode,
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dest_reg,
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orig_dest),
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expand_block_move_mem (BLKmode,
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src_reg,
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orig_src),
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GEN_INT (move_bytes),
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align_rtx));
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}
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else if (bytes > 4 && !TARGET_64BIT)
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else if (bytes > 4 && ! TARGET_POWERPC64)
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{ /* move up to 8 bytes at a time */
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move_bytes = (bytes > 8) ? 8 : bytes;
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emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
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expand_block_move_mem (BLKmode, src_reg, orig_src),
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emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode,
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dest_reg,
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orig_dest),
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expand_block_move_mem (BLKmode,
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src_reg,
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orig_src),
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GEN_INT (move_bytes),
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align_rtx));
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}
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else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
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else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT))
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{ /* move 4 bytes */
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move_bytes = 4;
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tmp_reg = gen_reg_rtx (SImode);
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emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src));
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emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg);
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emit_move_insn (tmp_reg,
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expand_block_move_mem (SImode,
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src_reg, orig_src));
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emit_move_insn (expand_block_move_mem (SImode,
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dest_reg, orig_dest),
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tmp_reg);
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}
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else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT))
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else if (bytes == 2 && (align >= 2 || ! STRICT_ALIGNMENT))
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{ /* move 2 bytes */
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move_bytes = 2;
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tmp_reg = gen_reg_rtx (HImode);
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emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src));
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emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg);
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emit_move_insn (tmp_reg,
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expand_block_move_mem (HImode,
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src_reg, orig_src));
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emit_move_insn (expand_block_move_mem (HImode,
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dest_reg, orig_dest),
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tmp_reg);
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}
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else if (bytes == 1) /* move 1 byte */
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{
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move_bytes = 1;
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tmp_reg = gen_reg_rtx (QImode);
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emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src));
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emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg);
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emit_move_insn (tmp_reg,
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expand_block_move_mem (QImode,
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src_reg, orig_src));
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emit_move_insn (expand_block_move_mem (QImode,
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dest_reg, orig_dest),
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tmp_reg);
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}
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else
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{ /* move up to 4 bytes at a time */
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move_bytes = (bytes > 4) ? 4 : bytes;
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emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
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expand_block_move_mem (BLKmode, src_reg, orig_src),
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emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode,
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dest_reg,
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orig_dest),
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expand_block_move_mem (BLKmode,
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src_reg,
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orig_src),
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GEN_INT (move_bytes),
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align_rtx));
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}
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if (bytes > move_bytes)
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{
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emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes)));
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emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes)));
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if (! TARGET_POWERPC64)
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{
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emit_insn (gen_addsi3 (src_reg, src_reg,
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GEN_INT (move_bytes)));
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emit_insn (gen_addsi3 (dest_reg, dest_reg,
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GEN_INT (move_bytes)));
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}
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else
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{
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emit_insn (gen_adddi3 (src_reg, src_reg,
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GEN_INT (move_bytes)));
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emit_insn (gen_adddi3 (dest_reg, dest_reg,
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GEN_INT (move_bytes)));
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}
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}
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}
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}
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@ -2209,34 +2254,61 @@ expand_block_move (operands)
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dest_addr = plus_constant (dest_reg, offset);
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}
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/* Generate the appropriate load and store, saving the stores for later */
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if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT))
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/* Generate the appropriate load and store, saving the stores
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for later. */
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if (bytes >= 8 && TARGET_POWERPC64
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/* 64-bit loads and stores require word-aligned displacements. */
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&& (align >= 8 || (! STRICT_ALIGNMENT && align >= 4)))
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{
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move_bytes = 8;
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tmp_reg = gen_reg_rtx (DImode);
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emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src)));
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stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg);
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emit_insn (gen_movdi (tmp_reg,
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expand_block_move_mem (DImode,
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src_addr,
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orig_src)));
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stores[num_reg++] = gen_movdi (expand_block_move_mem (DImode,
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dest_addr,
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orig_dest),
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tmp_reg);
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}
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else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
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else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT))
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{
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move_bytes = 4;
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tmp_reg = gen_reg_rtx (SImode);
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emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src)));
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stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg);
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emit_insn (gen_movsi (tmp_reg,
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expand_block_move_mem (SImode,
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src_addr,
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orig_src)));
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stores[num_reg++] = gen_movsi (expand_block_move_mem (SImode,
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dest_addr,
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orig_dest),
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tmp_reg);
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}
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else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT))
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else if (bytes >= 2 && (align >= 2 || ! STRICT_ALIGNMENT))
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{
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move_bytes = 2;
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tmp_reg = gen_reg_rtx (HImode);
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emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src)));
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stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg);
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emit_insn (gen_movsi (tmp_reg,
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expand_block_move_mem (HImode,
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src_addr,
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orig_src)));
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stores[num_reg++] = gen_movhi (expand_block_move_mem (HImode,
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dest_addr,
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orig_dest),
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tmp_reg);
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}
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else
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{
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move_bytes = 1;
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tmp_reg = gen_reg_rtx (QImode);
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emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src)));
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stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg);
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emit_insn (gen_movsi (tmp_reg,
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expand_block_move_mem (QImode,
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src_addr,
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orig_src)));
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stores[num_reg++] = gen_movqi (expand_block_move_mem (QImode,
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dest_addr,
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orig_dest),
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tmp_reg);
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}
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if (num_reg >= MAX_MOVE_REG)
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