backport: re PR target/41702 (FAIL: abi/demangle/abi_text/09.cc execution test)
Backport from mainline: 2009-10-15 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> PR target/41702 * pa.md (casesi): Use sign extended index in call to gen_casesi64p. (casesi64p): Update pattern to reflect above. From-SVN: r153042
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@ -1,3 +1,13 @@
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2009-10-20 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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Backport from mainline:
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2009-10-15 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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PR target/41702
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* pa.md (casesi): Use sign extended index in call to
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gen_casesi64p.
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(casesi64p): Update pattern to reflect above.
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2009-10-20 Joseph Myers <joseph@codesourcery.com>
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* config/arm/arm.c (output_move_neon): Use DImode in call to
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@ -7503,17 +7503,6 @@
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operands[0] = index;
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}
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/* In 64bit mode we must make sure to wipe the upper bits of the register
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just in case the addition overflowed or we had random bits in the
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high part of the register. */
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if (TARGET_64BIT)
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{
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rtx index = gen_reg_rtx (DImode);
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emit_insn (gen_extendsidi2 (index, operands[0]));
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operands[0] = gen_rtx_SUBREG (SImode, index, 4);
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}
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if (!INT_5_BITS (operands[2]))
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operands[2] = force_reg (SImode, operands[2]);
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@ -7530,6 +7519,17 @@
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emit_insn (gen_cmpsi (operands[0], operands[2]));
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emit_jump_insn (gen_bgtu (operands[4]));
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/* In 64bit mode we must make sure to wipe the upper bits of the register
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just in case the addition overflowed or we had random bits in the
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high part of the register. */
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if (TARGET_64BIT)
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{
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rtx index = gen_reg_rtx (DImode);
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emit_insn (gen_extendsidi2 (index, operands[0]));
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operands[0] = index;
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}
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if (TARGET_BIG_SWITCH)
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{
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if (TARGET_64BIT)
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@ -7590,8 +7590,7 @@
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;;; 64-bit code, 32-bit relative branch table.
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(define_insn "casesi64p"
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[(set (pc) (mem:DI (plus:DI
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(mult:DI (sign_extend:DI
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(match_operand:SI 0 "register_operand" "r"))
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(mult:DI (match_operand:DI 0 "register_operand" "r")
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(const_int 8))
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(label_ref (match_operand 1 "" "")))))
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(clobber (match_scratch:DI 2 "=&r"))
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