Add x86 CET documentation.
gcc/doc/ * extend.texi: Add x86 specific to 'nocf_check' attribute. List CET intrinsics. * invoke.texi: Add -mcet, -mibt, -mshstk options. Add x86 specific to -fcf-protection option. From-SVN: r253978
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2017-10-21 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* extend.texi: Add x86 specific to 'nocf_check' attribute.
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List CET intrinsics.
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* invoke.texi: Add -mcet, -mibt, -mshstk options. Add x86
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specific to -fcf-protection option.
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2017-10-21 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* common/config/i386/i386-common.c (OPTION_MASK_ISA_IBT_SET): New.
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@ -21519,6 +21519,25 @@ void __builtin_ia32_wrpkru (unsigned int)
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unsigned int __builtin_ia32_rdpkru ()
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@end smallexample
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The following built-in functions are available when @option{-mcet} is used.
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They are used to support Intel Control-flow Enforcment Technology (CET).
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Each built-in function generates the machine instruction that is part of the
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function's name.
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@smallexample
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unsigned int __builtin_ia32_rdsspd (unsigned int)
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unsigned long long __builtin_ia32_rdsspq (unsigned long long)
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void __builtin_ia32_incsspd (unsigned int)
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void __builtin_ia32_incsspq (unsigned long long)
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void __builtin_ia32_saveprevssp(void);
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void __builtin_ia32_rstorssp(void *);
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void __builtin_ia32_wrssd(unsigned int, void *);
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void __builtin_ia32_wrssq(unsigned long long, void *);
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void __builtin_ia32_wrussd(unsigned int, void *);
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void __builtin_ia32_wrussq(unsigned long long, void *);
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void __builtin_ia32_setssbsy(void);
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void __builtin_ia32_clrssbsy(void *);
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@end smallexample
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@node x86 transactional memory intrinsics
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@subsection x86 Transactional Memory Intrinsics
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@ -1204,6 +1204,7 @@ See RS/6000 and PowerPC Options.
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-msse4a -m3dnow -m3dnowa -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop @gol
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-mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx @gol
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-mmwaitx -mclzero -mpku -mthreads @gol
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-mcet -mibt -mshstk @gol
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-mms-bitfields -mno-align-stringops -minline-all-stringops @gol
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-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
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-mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol
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@ -11441,6 +11442,11 @@ You can also use the @code{nocf_check} attribute to identify
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which functions and calls should be skipped from instrumentation
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(@pxref{Function Attributes}).
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Currently the x86 GNU/Linux target provides an implementation based
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on Intel Control-flow Enforcement Technology (CET). Instrumentation
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for x86 is controlled by target-specific options @option{-mcet},
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@option{-mibt} and @option{-mshstk} (@pxref{x86 Options}).
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@item -fstack-protector
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@opindex fstack-protector
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Emit extra code to check for buffer overflows, such as stack smashing
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@ -25852,15 +25858,19 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
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@need 200
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@itemx -mclzero
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@opindex mclzero
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@need 200
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@itemx -mpku
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@opindex mpku
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@need 200
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@itemx -mcet
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@opindex mcet
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These switches enable the use of instructions in the MMX, SSE,
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SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD,
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SHA, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM,
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AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA AVX512VBMI, BMI, BMI2, FXSR,
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XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU, 3DNow!@: or enhanced 3DNow!@:
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extended instruction sets. Each has a corresponding @option{-mno-} option
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to disable use of these instructions.
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XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU, IBT, SHSTK,
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3DNow!@: or enhanced 3DNow!@: extended instruction sets. Each has a
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corresponding @option{-mno-} option to disable use of these instructions.
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These extensions are also available as built-in functions: see
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@ref{x86 Built-in Functions}, for details of the functions enabled and
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@ -25880,6 +25890,13 @@ supported architecture, using the appropriate flags. In particular,
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the file containing the CPU detection code should be compiled without
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these options.
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The @option{-mcet} option turns on the @option{-mibt} and @option{-mshstk}
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options. The @option{-mibt} option enables indirect branch tracking support
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and the @option{-mshstk} option enables shadow stack support from
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Intel Control-flow Enforcement Technology (CET). The compiler also provides
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a number of built-in functions for fine-grained control in a CET-based
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application. See @xref{x86 Built-in Functions}, for more information.
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@item -mdump-tune-features
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@opindex mdump-tune-features
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This option instructs GCC to dump the names of the x86 performance
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@ -25958,6 +25975,24 @@ see @ref{Other Builtins} for details.
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This option enables use of the @code{movbe} instruction to implement
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@code{__builtin_bswap32} and @code{__builtin_bswap64}.
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@item -mibt
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@opindex mibt
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This option tells the compiler to use indirect branch tracking support
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(for indirect calls and jumps) from x86 Control-flow Enforcement
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Technology (CET). The option has effect only if the
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@option{-fcf-protection=full} or @option{-fcf-protection=branch} option
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is specified. The option @option{-mibt} is on by default when the
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@code{-mcet} option is specified.
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@item -mshstk
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@opindex mshstk
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This option tells the compiler to use shadow stack support (return
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address tracking) from x86 Control-flow Enforcement Technology (CET).
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The option has effect only if the @option{-fcf-protection=full} or
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@option{-fcf-protection=return} option is specified. The option
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@option{-mshstk} is on by default when the @option{-mcet} option is
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specified.
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@item -mcrc32
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@opindex mcrc32
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This option enables built-in functions @code{__builtin_ia32_crc32qi},
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