(matcher for SFmode inequality comparison): Use cmfe, not cfm.
(matchers for {store-flag, not-store-flag, neg-store-flag}): Output if-false instruction first before if-true instruction. (matcher for (AND store-flag x)): Only match if reversible_cc_register. (matcher for (IF-THEN-ELSE reg (NOT reg))): Likewise. From-SVN: r7741
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31e6408aee
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@ -2792,8 +2792,8 @@
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(match_operand:SF 1 "fpu_add_operand" "fG,H")))]
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""
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"@
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cmf%?\\t%0, %1
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cnf%?\\t%0, #%N1"
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cmf%?e\\t%0, %1
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cnf%?e\\t%0, #%N1"
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[(set_attr "conds" "set")
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(set_attr "type" "f_2_r")])
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@ -3146,7 +3146,7 @@
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[(set (match_operand:SI 0 "s_register_operand" "=r")
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(match_operator:SI 1 "comparison_operator" [(reg 24) (const_int 0)]))]
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""
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"mov%d1\\t%0, #1\;mov%D1\\t%0, #0"
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"mov%D1\\t%0, #0\;mov%d1\\t%0, #1"
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[(set_attr "conds" "use")
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(set_attr "length" "8")])
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@ -3155,7 +3155,7 @@
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(neg:SI (match_operator:SI 1 "comparison_operator"
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[(reg 24) (const_int 0)])))]
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""
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"mvn%d1\\t%0, #0\;mov%D1\\t%0, #0"
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"mov%D1\\t%0, #0\;mvn%d1\\t%0, #0"
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[(set_attr "conds" "use")
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(set_attr "length" "8")])
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@ -3164,7 +3164,7 @@
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(not:SI (match_operator:SI 1 "comparison_operator"
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[(reg 24) (const_int 0)])))]
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""
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"mvn%d1\\t%0, #1\;mov%D1\\t%0, #0"
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"mov%D1\\t%0, #0\;mvn%d1\\t%0, #1"
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[(set_attr "conds" "use")
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(set_attr "length" "8")])
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@ -3634,7 +3634,7 @@
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(define_insn ""
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[(set (match_operand:SI 0 "s_register_operand" "=r")
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(and:SI (match_operator 1 "comparison_operator"
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[(reg 24) (const_int 0)])
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[(match_operand 3 "reversible_cc_register" "") (const_int 0)])
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(match_operand:SI 2 "s_register_operand" "r")))]
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""
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"mov%D1\\t%0, #0\;and%d1\\t%0, %2, #1"
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@ -3851,10 +3851,10 @@
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"*
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if (GET_CODE (operands[3]) == NE)
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{
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if (which_alternative != 0)
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output_asm_insn (\"mov%d4\\t%0, %1\", operands);
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if (which_alternative != 1)
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output_asm_insn (\"mov%D4\\t%0, %2\", operands);
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if (which_alternative != 0)
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output_asm_insn (\"mov%d4\\t%0, %1\", operands);
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return \"\";
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}
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if (which_alternative != 0)
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@ -5401,7 +5401,8 @@
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(define_insn ""
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[(set (match_operand:SI 0 "s_register_operand" "=r,r")
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(if_then_else:SI (match_operator 4 "comparison_operator"
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[(match_operand 3 "cc_register" "") (const_int 0)])
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[(match_operand 3 "reversible_cc_register" "")
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(const_int 0)])
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(match_operand:SI 1 "arm_rhs_operand" "0,?rI")
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(not:SI
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(match_operand:SI 2 "s_register_operand" "r,r"))))]
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