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h8300.md: Remove bit test patterns that cannot be triggered. 

* config/h8300/h8300.md: Remove bit test patterns that cannot
	be triggered.
	Restrict each bit test pattern to a variant on which the
	pattern is tested.

From-SVN: r49247
This commit is contained in:
Kazu Hirata 2002-01-26 15:29:52 +00:00 committed by Kazu Hirata
parent 93051e0f93
commit cd74ec597b
2 changed files with 25 additions and 35 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2002-01-26 Kazu Hirata <kazu@hxi.com>
* config/h8300/h8300.md: Remove bit test patterns that cannot
be triggered.
Restrict each bit test pattern to a variant on which the
pattern is tested.
2002-01-26 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* builtins.c (expand_builtin_strncat): Remove redundant check for

53
gcc/config/h8300/h8300.md
View File

@ -550,56 +550,39 @@
;; TEST INSTRUCTIONS
;; ----------------------------------------------------------------------
(define_insn ""
[(set (cc0) (zero_extract:QI (match_operand:QI 0 "bit_memory_operand" "r,U")
(const_int 1)
(match_operand:QI 1 "const_int_operand" "n,n")))]
""
"btst %Z1,%R0"
[(set_attr "length" "2,8")
(set_attr "cc" "set_zn,set_zn")])
(define_insn ""
[(set (cc0) (zero_extract:HI (match_operand:QI 0 "bit_memory_operand" "r,U")
(const_int 1)
(match_operand:QI 1 "const_int_operand" "n,n")))]
""
(match_operand 1 "const_int_operand" "n,n")))]
"TARGET_H8300"
"btst %Z1,%Y0"
[(set_attr "length" "2,8")
[(set_attr "length" "2,4")
(set_attr "cc" "set_zn,set_zn")])
(define_insn ""
[(set (cc0) (zero_extract:SI (match_operand:QI 0 "bit_memory_operand" "r,U")
(const_int 1)
(match_operand:QI 1 "const_int_operand" "n,n")))]
""
"btst %Z1,%Y0"
[(set_attr "length" "2,8")
(set_attr "cc" "set_zn,set_zn")])
(define_insn ""
[(set (cc0) (zero_extract:QI (match_operand:HI 0 "register_operand" "r")
(const_int 1)
(match_operand:HI 1 "const_int_operand" "n")))]
""
"btst %Z1,%R0"
[(set_attr "length" "2")
(set_attr "cc" "set_zn")])
(define_insn ""
[(set (cc0) (zero_extract:HI (match_operand:HI 0 "register_operand" "r")
(const_int 1)
(match_operand:HI 1 "const_int_operand" "n")))]
""
(match_operand 1 "const_int_operand" "n")))]
"TARGET_H8300"
"btst %Z1,%Y0"
[(set_attr "length" "2")
(set_attr "cc" "set_zn")])
(define_insn ""
[(set (cc0) (zero_extract:SI (match_operand:HI 0 "register_operand" "r")
[(set (cc0) (zero_extract:SI (match_operand:QI 0 "bit_memory_operand" "r,U")
(const_int 1)
(match_operand:HI 1 "const_int_operand" "n")))]
""
(match_operand 1 "const_int_operand" "n,n")))]
"TARGET_H8300H || TARGET_H8300S"
"btst %Z1,%Y0"
[(set_attr "length" "2,8")
(set_attr "cc" "set_zn,set_zn")])
(define_insn ""
[(set (cc0) (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
(const_int 1)
(match_operand 1 "const_int_operand" "n")))]
"(TARGET_H8300H || TARGET_H8300S)
&& INTVAL (operands[1]) <= 15"
"btst %Z1,%Y0"
[(set_attr "length" "2")
(set_attr "cc" "set_zn")])