arm.md (maddhisi4, *maddhidi4): Use the canonical operand order for plus.
2010-12-17 Andrew Stubbs <ams@codesourcery.com> gcc/ * config/arm/arm.md (maddhisi4, *maddhidi4): Use the canonical operand order for plus. Drop redundant % from constraints. From-SVN: r167991
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@ -1,3 +1,9 @@
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2010-12-17 Andrew Stubbs <ams@codesourcery.com>
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* config/arm/arm.md (maddhisi4, *maddhidi4): Use the canonical
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operand order for plus.
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Drop redundant % from constraints.
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2010-12-17 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
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* config/spu/t-spu-elf (LIB2FUNCS_EXCLUDE): Add _floattisf and
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@ -1793,11 +1793,11 @@
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(define_insn "maddhisi4"
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[(set (match_operand:SI 0 "s_register_operand" "=r")
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(plus:SI (match_operand:SI 3 "s_register_operand" "r")
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(mult:SI (sign_extend:SI
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(match_operand:HI 1 "s_register_operand" "%r"))
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(plus:SI (mult:SI (sign_extend:SI
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(match_operand:HI 1 "s_register_operand" "r"))
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(sign_extend:SI
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(match_operand:HI 2 "s_register_operand" "r")))))]
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(match_operand:HI 2 "s_register_operand" "r")))
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(match_operand:SI 3 "s_register_operand" "r")))]
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"TARGET_DSP_MULTIPLY"
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"smlabb%?\\t%0, %1, %2, %3"
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[(set_attr "insn" "smlaxy")
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@ -1807,11 +1807,11 @@
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(define_insn "*maddhidi4"
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[(set (match_operand:DI 0 "s_register_operand" "=r")
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(plus:DI
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(match_operand:DI 3 "s_register_operand" "0")
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(mult:DI (sign_extend:DI
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(match_operand:HI 1 "s_register_operand" "%r"))
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(match_operand:HI 1 "s_register_operand" "r"))
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(sign_extend:DI
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(match_operand:HI 2 "s_register_operand" "r")))))]
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(match_operand:HI 2 "s_register_operand" "r")))
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(match_operand:DI 3 "s_register_operand" "0")))]
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"TARGET_DSP_MULTIPLY"
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"smlalbb%?\\t%Q0, %R0, %1, %2"
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[(set_attr "insn" "smlalxy")
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