sparc.h (MASK_ISA): Add MASK_LEON and MASK_LEON3.
* config/sparc/sparc.h (MASK_ISA): Add MASK_LEON and MASK_LEON3. (MASK_FEATURES): New macro. * config/sparc/sparc.c (sparc_option_override): Remove the special handling of -mfpu and generalize it to all MASK_FEATURES switches. From-SVN: r249190
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@ -1,3 +1,10 @@
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2017-06-14 Eric Botcazou <ebotcazou@adacore.com>
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* config/sparc/sparc.h (MASK_ISA): Add MASK_LEON and MASK_LEON3.
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(MASK_FEATURES): New macro.
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* config/sparc/sparc.c (sparc_option_override): Remove the special
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handling of -mfpu and generalize it to all MASK_FEATURES switches.
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2017-06-14 Eric Botcazou <ebotcazou@adacore.com>
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* config/sparc/driver-sparc.c (cpu_names): Add SPARC-T5 entry.
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@ -1341,7 +1341,6 @@ sparc_option_override (void)
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};
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const struct cpu_table *cpu;
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unsigned int i;
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int fpu;
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if (sparc_debug_string != NULL)
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{
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@ -1433,8 +1432,6 @@ sparc_option_override (void)
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call_used_regs [i] = 1;
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}
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fpu = target_flags & MASK_FPU; /* save current -mfpu status */
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/* Set the default CPU. */
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if (!global_options_set.x_sparc_cpu_and_features)
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{
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@ -1473,22 +1470,18 @@ sparc_option_override (void)
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#ifndef HAVE_AS_LEON
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& ~(MASK_LEON | MASK_LEON3)
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#endif
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& ~(target_flags_explicit & MASK_FEATURES)
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);
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/* If -mfpu or -mno-fpu was explicitly used, don't override with
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the processor default. */
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if (target_flags_explicit & MASK_FPU)
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target_flags = (target_flags & ~MASK_FPU) | fpu;
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/* -mvis2 implies -mvis */
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/* -mvis2 implies -mvis. */
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if (TARGET_VIS2)
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target_flags |= MASK_VIS;
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/* -mvis3 implies -mvis2 and -mvis */
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/* -mvis3 implies -mvis2 and -mvis. */
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if (TARGET_VIS3)
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target_flags |= MASK_VIS2 | MASK_VIS;
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/* -mvis4 implies -mvis3, -mvis2 and -mvis */
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/* -mvis4 implies -mvis3, -mvis2 and -mvis. */
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if (TARGET_VIS4)
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target_flags |= MASK_VIS3 | MASK_VIS2 | MASK_VIS;
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@ -1499,15 +1492,14 @@ sparc_option_override (void)
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| MASK_FMAF);
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/* -mvis assumes UltraSPARC+, so we are sure v9 instructions
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are available.
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-m64 also implies v9. */
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are available; -m64 also implies v9. */
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if (TARGET_VIS || TARGET_ARCH64)
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{
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target_flags |= MASK_V9;
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target_flags &= ~(MASK_V8 | MASK_SPARCLET | MASK_SPARCLITE);
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}
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/* -mvis also implies -mv8plus on 32-bit */
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/* -mvis also implies -mv8plus on 32-bit. */
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if (TARGET_VIS && ! TARGET_ARCH64)
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target_flags |= MASK_V8PLUS;
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@ -423,10 +423,15 @@ extern enum cmodel sparc_cmodel;
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#define WCHAR_TYPE_SIZE 16
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/* Mask of all CPU selection flags. */
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#define MASK_ISA \
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(MASK_SPARCLITE + MASK_SPARCLET \
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#define MASK_ISA \
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(MASK_SPARCLITE + MASK_SPARCLET + MASK_LEON + MASK_LEON3 \
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+ MASK_V8 + MASK_V9 + MASK_DEPRECATED_V8_INSNS)
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/* Mask of all CPU feature flags. */
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#define MASK_FEATURES \
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(MASK_FPU + MASK_HARD_QUAD + MASK_VIS + MASK_VIS2 + MASK_VIS3 \
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+ MASK_VIS4 + MASK_CBCOND + MASK_FMAF + MASK_POPC + MASK_SUBXC)
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/* TARGET_HARD_MUL: Use 32-bit hardware multiply instructions but not %y. */
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#define TARGET_HARD_MUL \
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(TARGET_SPARCLITE || TARGET_SPARCLET \
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@ -1,3 +1,7 @@
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2017-06-14 Eric Botcazou <ebotcazou@adacore.com>
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* gcc.target/sparc/overflow-4.c: Add -mno-vis3.
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2017-06-09 Janus Weil <janus@gcc.gnu.org>
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Backport from trunk
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@ -1,5 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-O" } */
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/* { dg-options "-O -mno-vis3" } */
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/* { dg-require-effective-target lp64 } */
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#include <stdbool.h>
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