gcc/config/cris: Remove shared-library and CRIS v32 support.
Part of the removal of crisv32-* and cris-*-linux* (cris-elf remains). Essentially everything is gone, including functions and target-specific definitions and most obvious knock-on effects, like removing unused functions and arguments. There's one exception: the register-class effects of the CRIS v32 ACR register are deliberately excluded and left in (i.e. its use by-number is removed and the ACE_REGS regclass is always unusable - but present). Changing register class definitions to remove ACR_REGS and related classes (folding their uses into remaining classes), causes extra register moves in libgcc (as an immediate observation; actual net effect unknown), which is unwanted both for performance reasons and also causing extra work comparing before/after cc0-machinery-conversion changes ahead. The actual cause and solution for these negative effects of cleaning up the register-classes will at the moment have to remain to-be-investigated. If CRIS v32 support is reinstated, consider doing the .md part not as separate patterns with opposite conditions but merged patterns with necessarily-different alternatives using the "enabled" attribute (which was not invented back then). Also, a single ACR-related RTL-dump example in a cris.md comment, related to a strict_low_part issue is kept, but marked as obsolete. Note that the "b" register-constraint (non-ACR registers; can be used for post-increment) is left in, as that may have extant uses outside of gcc. Its availability is tested by gcc.target/cris/asm-b-1.c. When ACR register classes are removed, it's probably best to make it equal to GENERAL_REGS. gcc: * config/cris: Remove shared-library and CRIS v32 support.
This commit is contained in:
Hans-Peter Nilsson
parent
0e44849e9e
commit
d0780379c1
@ -7,6 +7,7 @@
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* config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
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Remove.
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* config/cris/t-elfmulti: Remove crisv32 multilib.
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* config/cris: Remove shared-library and CRIS v32 support.
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2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
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@ -18,9 +18,6 @@
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;; <http://www.gnu.org/licenses/>.
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;; Register constraints.
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(define_register_constraint "a" "ACR_REGS"
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"@internal")
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(define_register_constraint "b" "GENNONACR_REGS"
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"@internal")
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@ -106,7 +103,7 @@
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;; A [reg] or (int) [reg], maybe with post-increment.
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(match_test "cris_bdap_index_p (op, reload_in_progress
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|| reload_completed)")
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(match_test "cris_constant_index_p (op)")))
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(match_test "CONSTANT_P (op)")))
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(define_constraint "T"
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"Memory three-address operand."
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@ -118,14 +115,14 @@
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reload_in_progress
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|| reload_completed)"))
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;; Just an explicit indirect reference: [const]?
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(match_test "CRIS_CONSTANT_P (XEXP (op, 0))")
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(match_test "CONSTANT_P (XEXP (op, 0))")
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;; Something that is indexed; [...+...]?
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(and (match_code "plus" "0")
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;; A BDAP constant: [reg+(8|16|32)bit offset]?
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(ior (and (match_test "cris_base_p (XEXP (XEXP (op, 0), 0),
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reload_in_progress
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|| reload_completed)")
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(match_test "cris_constant_index_p (XEXP (XEXP (op, 0), 1))"))
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(match_test "CONSTANT_P (XEXP (XEXP (op, 0), 1))"))
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;; A BDAP register: [reg+[reg(+)].S]?
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(and (match_test "cris_base_p (XEXP (XEXP (op, 0), 0),
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reload_in_progress
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@ -149,18 +146,3 @@
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(match_test "cris_biap_index_p (XEXP (XEXP (op, 0), 0),
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reload_in_progress
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|| reload_completed)")))))))
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(define_constraint "S"
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"PIC-constructs for symbols."
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(and (match_test "flag_pic")
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(match_code "const")
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(match_test "cris_valid_pic_const (op, false)")))
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(define_constraint "U"
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"@internal"
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(and (match_test "flag_pic")
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;; We're just interested in the ..._or_callable_symbol part.
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;; (Using CRIS_CONSTANT_P would exclude that too.)
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(match_test "CONSTANT_P (op)")
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(match_operand 0 "cris_nonmemory_operand_or_callable_symbol")))
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@ -27,14 +27,8 @@ extern void cris_notice_update_cc (rtx, rtx_insn *);
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extern bool cris_reload_address_legitimized (rtx, machine_mode, int, int, int);
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extern int cris_side_effect_mode_ok (enum rtx_code, rtx *, int, int,
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int, int, int);
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extern bool cris_cc0_user_requires_cmp (rtx_insn *);
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extern rtx cris_return_addr_rtx (int, rtx);
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extern rtx cris_split_movdx (rtx *);
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extern int cris_legitimate_pic_operand (rtx);
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extern enum cris_symbol_type cris_symbol_type_of (const_rtx);
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extern bool cris_valid_pic_const (const_rtx, bool);
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extern bool cris_legitimate_constant_p (machine_mode, rtx);
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extern bool cris_constant_index_p (const_rtx);
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extern bool cris_base_p (const_rtx, bool);
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extern bool cris_base_or_autoincr_p (const_rtx, bool);
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extern bool cris_bdap_index_p (const_rtx, bool);
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@ -44,11 +38,9 @@ extern bool cris_legitimate_address_p (machine_mode, rtx, bool);
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extern bool cris_store_multiple_op_p (rtx);
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extern bool cris_movem_load_rest_p (rtx, int);
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extern void cris_asm_output_symbol_ref (FILE *, rtx);
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extern int cris_cfun_uses_pic_table (void);
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extern void cris_asm_output_case_end (FILE *, int, rtx_insn *);
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extern rtx cris_gen_movem_load (rtx, rtx, int);
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extern rtx cris_emit_movem_store (rtx, rtx, int, bool);
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extern void cris_expand_pic_call_address (rtx *, rtx *);
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extern void cris_order_for_addsi3 (rtx *, int);
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extern void cris_emit_trap_for_misalignment (rtx);
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#endif /* RTX_CODE */
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File diff suppressed because it is too large
Load Diff
@ -64,15 +64,6 @@ along with GCC; see the file COPYING3. If not see
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never clash with it for GCC purposes. */
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#define CRIS_CANONICAL_CC0_REGNUM (16 + 13)
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/* When generating PIC, these suffixes are added to the names of non-local
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functions when being output. Contrary to other ports, we have offsets
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relative to the GOT, not the PC. We might implement PC-relative PLT
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semantics later for the general case; they are used in some cases right
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now, such as MI thunks. */
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#define CRIS_GOTPLT_SUFFIX ":GOTPLT"
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#define CRIS_PLT_GOTOFFSET_SUFFIX ":PLTG"
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#define CRIS_PLT_PCOFFSET_SUFFIX ":PLT"
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#define CRIS_FUNCTION_ARG_SIZE(MODE, TYPE) \
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((MODE) != BLKmode ? GET_MODE_SIZE (MODE) \
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: (unsigned) int_size_in_bytes (TYPE))
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@ -115,19 +106,10 @@ extern int cris_cpu_version;
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#define CRIS_DEFAULT_ASM_ARCH_OPTION ""
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#ifdef TARGET_CPU_DEFAULT
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#if TARGET_CPU_DEFAULT != 32 && TARGET_CPU_DEFAULT != 10
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#if TARGET_CPU_DEFAULT != 10
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#error "Due to '()'; e.g. '#define TARGET_CPU_DEFAULT (10)', stringize TARGET_CPU_DEFAULT isn't useful: update manually."
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#endif
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#if TARGET_CPU_DEFAULT == 32
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#undef CRIS_DEFAULT_TUNE
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#define CRIS_DEFAULT_TUNE "32"
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/* To enable use of "generic" cris-axis-elf binutils, always pass the
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architecture option to GAS. (We don't do this for non-v32.) */
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#undef CRIS_DEFAULT_ASM_ARCH_OPTION
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#define CRIS_DEFAULT_ASM_ARCH_OPTION "--march=v32"
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#endif
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#undef CRIS_ARCH_CPP_DEFAULT
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#define CRIS_ARCH_CPP_DEFAULT \
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"%{!march=*:\
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@ -183,8 +165,7 @@ extern int cris_cpu_version;
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"%(asm_subtarget)\
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%{march=*:%{mcpu=*:%edo not specify both -march=... and -mcpu=...}}\
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%{march=v0|mcpu=v0|march=v3|mcpu=v3|march=v8|mcpu=v8:--march=v0_v10}\
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%{march=v10|mcpu=v10:--march=v10}\
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%{march=v32|mcpu=v32:--march=v32}"
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%{march=v10|mcpu=v10:--march=v10}"
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/* For the cris-*-elf subtarget. */
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#define CRIS_ASM_SUBTARGET_SPEC \
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@ -252,10 +233,6 @@ extern int cris_cpu_version;
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} \
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while (0)
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/* Previously controlled by target_flags. Note that this is *not* set
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for -melinux. */
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#define TARGET_LINUX 0
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/* For the cris-*-elf subtarget. */
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#define CRIS_SUBTARGET_DEFAULT 0
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@ -263,24 +240,17 @@ extern int cris_cpu_version;
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#define CRIS_CPU_ETRAX4 3 /* Just lz added. */
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#define CRIS_CPU_SVINTO 8 /* Added swap, jsrc & Co., 32-bit accesses. */
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#define CRIS_CPU_NG 10 /* Added mul[su]. */
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#define CRIS_CPU_V32 32 /* Major changes. */
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#ifndef TARGET_CPU_DEFAULT
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#define TARGET_CPU_DEFAULT CRIS_CPU_BASE
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#endif
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/* Default target_flags if no switches specified.
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The alignment-by-32 is to make builtin atomic support for v10 and v32
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The alignment-by-32 is to make builtin atomic support for v10
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work for *-elf for types without specified alignment (like plain
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"int"). See top comment in sync.md. */
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#ifndef TARGET_DEFAULT
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# if TARGET_CPU_DEFAULT == 32
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# define TARGET_DEFAULT \
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(MASK_STACK_ALIGN \
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+ MASK_CONST_ALIGN + MASK_DATA_ALIGN \
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+ MASK_ALIGN_BY_32 \
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+ MASK_PROLOGUE_EPILOGUE)
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# elif TARGET_CPU_DEFAULT == 10
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# if TARGET_CPU_DEFAULT == 10
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# define TARGET_DEFAULT \
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(MASK_SIDE_EFFECT_PREFIXES + MASK_STACK_ALIGN \
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+ MASK_CONST_ALIGN + MASK_DATA_ALIGN \
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@ -301,16 +271,15 @@ extern int cris_cpu_version;
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#define TARGET_HAS_LZ (cris_cpu_version >= CRIS_CPU_ETRAX4)
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#define TARGET_HAS_BREAK (cris_cpu_version >= CRIS_CPU_ETRAX4)
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#define TARGET_HAS_SWAP (cris_cpu_version >= CRIS_CPU_SVINTO)
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#define TARGET_V32 (cris_cpu_version >= CRIS_CPU_V32)
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/* The "break" instruction was introduced with ETRAX 4. */
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#define TARGET_TRAP_USING_BREAK8 \
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(cris_trap_using_break8 == 2 ? TARGET_HAS_BREAK : cris_trap_using_break8)
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/* Call library functions by default for GNU/Linux. */
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/* This condition controls whether to expand atomics inline or call
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library functions. */
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#define TARGET_ATOMICS_MAY_CALL_LIBFUNCS \
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(cris_atomics_calling_libfunc == 2 \
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? TARGET_LINUX : cris_atomics_calling_libfunc)
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(cris_atomics_calling_libfunc != 2 && cris_atomics_calling_libfunc != 0)
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/* The < v10 atomics turn off interrupts, so they don't need alignment.
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Incidentally, by default alignment is off there causing variables to
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@ -319,7 +288,7 @@ extern int cris_cpu_version;
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specify as aligned. */
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#define TARGET_TRAP_UNALIGNED_ATOMIC \
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(cris_trap_unaligned_atomic == 2 \
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? (TARGET_V32 || cris_cpu_version == 10) \
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? cris_cpu_version == 10 \
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: cris_trap_unaligned_atomic)
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/* Node: Storage Layout */
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@ -450,13 +419,6 @@ extern int cris_cpu_version;
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#define REG_ALLOC_ORDER \
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{9, 13, 12, 11, 10, 0, 1, 2, 3, 4, 5, 6, 7, 8, 14, 15, 17, 16, 18, 19}
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/* Use MOF and ACR. Prefer ACR before any other register. Prefer MOF
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then SRP after saved registers. The *after* is because they're only
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useful for storage, not for things being computed, which is
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apparently more common. */
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#define REG_ALLOC_ORDER_V32 \
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{15, 9, 13, 12, 11, 10, 0, 1, 2, 3, 4, 5, 6, 7, 8, 17, 16, 14, 18, 19}
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/* Node: Leaf Functions */
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/* (no definitions) */
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@ -542,14 +504,6 @@ enum reg_class
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|| (unsigned) reg_renumber[REGNO] <= CRIS_LAST_GENERAL_REGISTER \
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|| (unsigned) reg_renumber[REGNO] == ARG_POINTER_REGNUM)
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/* REGNO_OK_FOR_BASE_P seems to be obsolete wrt. this one, but not yet
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documented as such. */
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#define REGNO_MODE_CODE_OK_FOR_BASE_P(REGNO, MODE, AS, OCODE, ICODE) \
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(REGNO_OK_FOR_BASE_P (REGNO) \
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&& ((OCODE) != POST_INC \
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|| !((REGNO) == CRIS_ACR_REGNUM \
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|| (unsigned) reg_renumber[REGNO] == CRIS_ACR_REGNUM)))
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/* See REGNO_OK_FOR_BASE_P. */
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#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
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@ -566,11 +520,6 @@ enum reg_class
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GENERAL_REGS))) \
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? GENERAL_REGS : NO_REGS)
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/* FIXME: Fix regrename.c; it should check validity of replacements,
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not just with a silly pass-specific macro. We may miss some
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opportunities, but we must stop regrename from creating acr++. */
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#define HARD_REGNO_RENAME_OK(FROM, TO) ((TO) != CRIS_ACR_REGNUM)
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/* For CRIS, this is always the size of MODE in words,
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since all registers are the same size. To use omitted modes in
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patterns with reload constraints, you must say the widest size
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@ -716,7 +665,7 @@ struct cum_args {int regs;};
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/* Node: Trampolines */
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#define TRAMPOLINE_SIZE (TARGET_V32 ? 58 : 32)
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#define TRAMPOLINE_SIZE 32
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/* CRIS wants instructions on word-boundary. */
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#define TRAMPOLINE_ALIGNMENT 16
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@ -735,8 +684,6 @@ struct cum_args {int regs;};
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#define CONSTANT_ADDRESS_P(X) \
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(CONSTANT_P (X) && cris_legitimate_address_p (QImode, X, false))
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/* Must be a compile-time constant, so we go with the highest value
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among all CRIS variants. */
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#define MAX_REGS_PER_ADDRESS 2
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/* Fix reloads known to cause suboptimal spilling. */
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@ -748,12 +695,6 @@ struct cum_args {int regs;};
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} \
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while (0)
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/* The mode argument to cris_legitimate_constant_p isn't used, so just
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pass a cheap dummy. N.B. we have to cast away const from the
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parameter rather than adjust the parameter, as it's type is mandated
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by the TARGET_LEGITIMATE_CONSTANT_P target hook interface. */
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#define CRIS_CONSTANT_P(X) \
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(CONSTANT_P (X) && cris_legitimate_constant_p (VOIDmode, CONST_CAST_RTX (X)))
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/* Node: Condition Code */
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@ -789,25 +730,6 @@ struct cum_args {int regs;};
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#define JUMP_TABLES_IN_TEXT_SECTION 1
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/* Node: PIC */
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/* Helper type. */
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enum cris_symbol_type
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{
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cris_no_symbol = 0,
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cris_got_symbol = 1,
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cris_rel_symbol = 2,
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cris_got_symbol_needing_fixup = 3,
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cris_unspec = 7,
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cris_offsettable_symbol = 8
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};
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#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? CRIS_GOT_REGNUM : INVALID_REGNUM)
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#define LEGITIMATE_PIC_OPERAND_P(X) cris_legitimate_pic_operand (X)
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/* Node: File Framework */
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/* We don't want an .ident for gcc. To avoid that but still support
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@ -898,10 +820,10 @@ enum cris_symbol_type
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#define REGISTER_NAMES \
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{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \
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"r9", "r10", "r11", "r12", "r13", "sp", "acr", "srp", "mof", "faked_ap", "dccr"}
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"r9", "r10", "r11", "r12", "r13", "sp", "pc", "srp", "mof", "faked_ap", "dccr"}
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#define ADDITIONAL_REGISTER_NAMES \
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{{"r14", 14}, {"r15", 15}, {"pc", 15}}
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{{"r14", 14}, {"r15", 15}}
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/* Output an empty line to illustrate the presence of the delay slot. */
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#define DBR_OUTPUT_SEQEND(FILE) \
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@ -922,10 +844,7 @@ enum cris_symbol_type
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#define USER_LABEL_PREFIX "_"
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#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
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fprintf (FILE, \
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TARGET_V32 \
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? "\tsubq 4,$sp\n\tmove $%s,[$sp]\n" : "\tpush $%s\n", \
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reg_names[REGNO])
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fprintf (FILE, "\tpush $%s\n", reg_names[REGNO])
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#define ASM_OUTPUT_REG_POP(FILE, REGNO) \
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fprintf (FILE, "\tmove [$sp+],$%s\n", reg_names[REGNO])
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@ -934,14 +853,7 @@ enum cris_symbol_type
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/* Node: Dispatch Tables */
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#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
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do \
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{ \
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if (TARGET_V32) \
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asm_fprintf (FILE, "\t.word %LL%d-.\n", VALUE); \
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else \
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asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL); \
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} \
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while (0)
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asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL)
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#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
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asm_fprintf (FILE, "\t.dword %LL%d\n", VALUE)
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File diff suppressed because it is too large
Load Diff
@ -196,7 +196,3 @@ Mask(SVINTO)
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; TARGET_ALIGN_BY_32: Say that all alignment specifications say
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; to prefer 32 rather than 16 bits.
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Mask(ALIGN_BY_32)
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; TARGET_AVOID_GOTPLT is referred to in the .c and the .md so we
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; need to allocate the flag and macros here.
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Mask(AVOID_GOTPLT)
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@ -61,9 +61,7 @@
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;; Operand helper predicates.
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(define_predicate "cris_bdap_const_operand"
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(and (match_code "label_ref, symbol_ref, const_int, const_double, const")
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(ior (not (match_test "flag_pic"))
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(match_test "cris_valid_pic_const (op, true)"))))
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(match_operand 0 "immediate_operand"))
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(define_predicate "cris_simple_address_operand"
|
||||
(ior (match_operand:SI 0 "register_operand")
|
||||
@ -132,59 +130,3 @@
|
||||
(define_predicate "cris_bdap_biap_operand"
|
||||
(ior (match_operand 0 "cris_bdap_operand")
|
||||
(match_operand 0 "cris_biap_mult_operand")))
|
||||
|
||||
;; Since with -fPIC, not all symbols are valid PIC symbols or indeed
|
||||
;; general_operands, we have to have a predicate that matches it for the
|
||||
;; "movsi" expander.
|
||||
;; FIXME: Can s/special_// when PR 20413 is fixed.
|
||||
|
||||
(define_special_predicate "cris_general_operand_or_symbol"
|
||||
(ior (match_operand 0 "general_operand")
|
||||
(and (match_code "const, symbol_ref, label_ref")
|
||||
; The following test is actually just an assertion.
|
||||
(match_test "cris_symbol_type_of (op) != cris_no_symbol"))))
|
||||
|
||||
;; A predicate for the anon movsi expansion, one that fits a PCREL
|
||||
;; operand as well as general_operand.
|
||||
|
||||
(define_special_predicate "cris_general_operand_or_pic_source"
|
||||
(ior (match_operand 0 "general_operand")
|
||||
(and (match_test "flag_pic")
|
||||
(match_test "cris_valid_pic_const (op, false)"))))
|
||||
|
||||
;; Since a PLT symbol is not a general_operand, we have to have a
|
||||
;; predicate that matches it when we need it. We use this in the expanded
|
||||
;; "call" and "call_value" anonymous patterns.
|
||||
|
||||
(define_predicate "cris_nonmemory_operand_or_callable_symbol"
|
||||
(ior (match_operand 0 "nonmemory_operand")
|
||||
(and (match_code "const")
|
||||
(and
|
||||
(match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
|
||||
(ior
|
||||
(match_test "XINT (XEXP (op, 0), 1) == CRIS_UNSPEC_PLT_PCREL")
|
||||
(match_test "XINT (XEXP (op, 0), 1) == CRIS_UNSPEC_PCREL"))))))
|
||||
|
||||
;; This matches a (MEM (general_operand)) or
|
||||
;; (MEM (cris_general_operand_or_symbol)). The second one isn't a valid
|
||||
;; memory_operand, so we need this predicate to recognize call
|
||||
;; destinations before we change them to a PLT operand (by wrapping in
|
||||
;; UNSPEC CRIS_UNSPEC_PLT).
|
||||
|
||||
(define_predicate "cris_mem_call_operand"
|
||||
(and (match_code "mem")
|
||||
(ior (match_operand 0 "memory_operand")
|
||||
(match_test "cris_general_operand_or_symbol (XEXP (op, 0),
|
||||
Pmode)"))))
|
||||
|
||||
;; A marker for the call-insn: (const_int 0) for a call to a
|
||||
;; hidden or static function and non-pic and
|
||||
;; pic_offset_table_rtx for a call that *might* go through the
|
||||
;; PLT.
|
||||
|
||||
(define_predicate "cris_call_type_marker"
|
||||
(ior (and (match_operand 0 "const_int_operand")
|
||||
(match_test "op == const0_rtx"))
|
||||
(and (and (match_operand 0 "register_operand")
|
||||
(match_test "op == pic_offset_table_rtx"))
|
||||
(match_test "flag_pic != 0"))))
|
||||
|
||||
@ -22,17 +22,12 @@
|
||||
;;
|
||||
;; - Plain old CRIS v0 (..v8)
|
||||
;; - CRIS v10 (as used in ETRAX 100 LX)
|
||||
;; - CRIS v32 (as used in ETRAX FS)
|
||||
;;
|
||||
;; The last two alternatives are similar, of LL/SC type. They may
|
||||
;; The second alternative is of LL/SC type. It may
|
||||
;; fail for other reasons; an exception, a cache miss or a bus request
|
||||
;; from other parts of the system. The difference between them is
|
||||
;; just in what condition-codes are used to track LL and success or
|
||||
;; failure for the store. See the chapter on integral read-write
|
||||
;; from other parts of the system. See the chapter on integral read-write
|
||||
;; operations, chapter 1.13 in "ETRAX 100LX Programmers Manual",
|
||||
;; <http://www.axis.com/files/tech_notes/etrax_100lx_prog_man-050519.pdf>
|
||||
;; and chapter 2.1 in "ETRAX FS Designer's reference",
|
||||
;; <http://www.axis.com/files/manuals/etrax_fs_des_ref-070821.pdf>.
|
||||
;; <http://www.axis.com/files/tech_notes/etrax_100lx_prog_man-050519.pdf>.
|
||||
;; Note that the datum being stored has to be contained fully within a
|
||||
;; cache-line to be integral. A failure to store the data integrally
|
||||
;; will be flagged, but the store may still have happened in part,
|
||||
@ -134,18 +129,7 @@
|
||||
/* Can't be too sure; better ICE if this happens. */
|
||||
gcc_assert (!reg_overlap_mentioned_p (operands[2], operands[1]));
|
||||
|
||||
if (TARGET_V32)
|
||||
return
|
||||
"clearf p\n"
|
||||
".Lsync.%=:\;"
|
||||
"move<m> %1,%0\;"
|
||||
"move.d %0,%3\;"
|
||||
"<atomic_op_mnem_pre_op2>,%3\;<atomic_op_mnem_post_op3>"
|
||||
"ax\;"
|
||||
"move<m> %3,%1\;"
|
||||
"bcs .Lsync.%=\;"
|
||||
"clearf p";
|
||||
else if (cris_cpu_version == 10)
|
||||
if (cris_cpu_version == 10)
|
||||
return
|
||||
"clearf\n"
|
||||
".Lsync.%=:\;"
|
||||
@ -245,20 +229,7 @@
|
||||
CRIS_UNSPEC_ATOMIC_SWAP_MEM))]
|
||||
"<MODE>mode == QImode || !TARGET_ATOMICS_MAY_CALL_LIBFUNCS"
|
||||
{
|
||||
if (TARGET_V32)
|
||||
return
|
||||
"\n.Lsync.repeat.%=:\;"
|
||||
"clearf p\;"
|
||||
"move<m> %2,%1\;"
|
||||
"cmp<qm3> %3,%1\;"
|
||||
"bne .Lsync.after.%=\;"
|
||||
"ax\;"
|
||||
|
||||
"move<m> %4,%2\;"
|
||||
"bcs .Lsync.repeat.%=\n"
|
||||
".Lsync.after.%=:\;"
|
||||
"seq %0";
|
||||
else if (cris_cpu_version == 10)
|
||||
if (cris_cpu_version == 10)
|
||||
return
|
||||
"\n.Lsync.repeat.%=:\;"
|
||||
"clearf\;"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user