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mmx.md: Rename "*..." insn patterns from my previous commit to "*mmx_...".

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* config/i386/mmx.md: Rename "*..." insn patterns from my
	previous commit to "*mmx_...".

From-SVN: r134991
This commit is contained in:
Uros Bizjak 2008-05-06 19:41:46 +02:00
parent 71c10038d1
commit d0b48c6701
2 changed files with 24 additions and 25 deletions
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25
gcc/ChangeLog
View File

@ -1,8 +1,7 @@
2008-05-06 H.J. Lu <hongjiu.lu@intel.com>
PR target/35657
* config/i386/i386.c (contains_128bit_aligned_vector_p): Renamed
to ...
* config/i386/i386.c (contains_128bit_aligned_vector_p): Renamed to ...
(contains_aligned_value_p): This. Handle _Decimal128.
(ix86_function_arg_boundary): Only align _Decimal128 to its
natural boundary and handle it properly.
@ -95,43 +94,43 @@
2008-05-06 Uros Bizjak <ubizjak@gmail.com>
* config/i386/mmx.md: Remove double backslashes from asm templates.
(*addv2sf3): Rename from mmx_addv2sf3 insn pattern.
(*mmx_addv2sf3): Rename from mmx_addv2sf3 insn pattern.
(mmx_addv2sf3): New expander. Use ix86_fixup_binary_operands_no_copy
to handle nonimmediate operands.
(*mulv2sf3): Rename from mmx_mulv2sf3 insn pattern.
(*mmx_mulv2sf3): Rename from mmx_mulv2sf3 insn pattern.
(mmx_mulv2sf3): New expander. Use ix86_fixup_binary_operands_no_copy
to handle nonimmediate operands.
(*<code>v2sf3_finite): New insn pattern.
(*<code>v2sf3): Rename from mmx_<code>v2sf3 insn pattern.
(*mmx_<code>v2sf3_finite): New insn pattern.
(*mmx_<code>v2sf3): Rename from mmx_<code>v2sf3 insn pattern.
(mmx_<code>v2sf3): New expander. Use
ix86_fixup_binary_operands_no_copy to handle nonimmediate operands.
(mmx_<plusminus_insn><mode>3): New expander. Use
ix86_fixup_binary_operands_no_copy to handle nonimmediate operands.
(*<plusminus_insn><mode>3): New insn pattern.
(*mmx_<plusminus_insn><mode>3): New insn pattern.
(mmx_add<mode>3): Removed.
(mmx_ssadd<mode>3): Ditto.
(mmx_usadd<mode>3): Ditto.
(mmx_sub<mode>3): Ditto.
(mmx_sssub<mode>3): Ditto.
(mmx_ussub<mode>3): Ditto.
(*mulv4hi3): Rename from mmx_mulv4hi3 insn pattern.
(*mmx_mulv4hi3): Rename from mmx_mulv4hi3 insn pattern.
(mmx_mulv4hi3): New expander. Use ix86_fixup_binary_operands_no_copy
to handle nonimmediate operands.
(*smulv4hi3_highpart): Rename from mmx_smulv4hi3_highpart
(*mmx_smulv4hi3_highpart): Rename from mmx_smulv4hi3_highpart
insn pattern.
(mmx_smulv4hi3_highpart): New expander. Use
ix86_fixup_binary_operands_no_copy to handle nonimmediate operands.
(*umulv4hi3_highpart): Rename from mmx_umulv4hi3_highpart
(*mmx_umulv4hi3_highpart): Rename from mmx_umulv4hi3_highpart
insn pattern.
(mmx_umulv4hi3_highpart): New expander. Use
ix86_fixup_binary_operands_no_copy to handle nonimmediate operands.
(*<code>v4hi3): Rename from mmx_<code>v4hi3 insn pattern.
(*mmx_<code>v4hi3): Rename from mmx_<code>v4hi3 insn pattern.
(mmx_<code>v4hi3): New expander. Use
ix86_fixup_binary_operands_no_copy to handle nonimmediate operands.
(*<code>v8qi3): Rename from mmx_<code>v8qi3 insn pattern.
(*mmx_<code>v8qi3): Rename from mmx_<code>v8qi3 insn pattern.
(mmx_<code>v8qi3): New expander. Use
ix86_fixup_binary_operands_no_copy to handle nonimmediate operands.
(*<code><mode>3): Rename from mmx_<code><mode>3 insn pattern.
(*mmx_<code><mode>3): Rename from mmx_<code><mode>3 insn pattern.
(mmx_<code><mode>3): New expander. Use
ix86_fixup_binary_operands_no_copy to handle nonimmediate operands.

24
gcc/config/i386/mmx.md
View File

@ -220,7 +220,7 @@
"TARGET_3DNOW"
"ix86_fixup_binary_operands_no_copy (PLUS, V2SFmode, operands);")
(define_insn "*addv2sf3"
(define_insn "*mmx_addv2sf3"
[(set (match_operand:V2SF 0 "register_operand" "=y")
(plus:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "%0")
(match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
@ -254,7 +254,7 @@
"TARGET_3DNOW"
"ix86_fixup_binary_operands_no_copy (MULT, V2SFmode, operands);")
(define_insn "*mulv2sf3"
(define_insn "*mmx_mulv2sf3"
[(set (match_operand:V2SF 0 "register_operand" "=y")
(mult:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "%0")
(match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
@ -279,7 +279,7 @@
ix86_fixup_binary_operands_no_copy (<CODE>, V2SFmode, operands);
})
(define_insn "*<code>v2sf3_finite"
(define_insn "*mmx_<code>v2sf3_finite"
[(set (match_operand:V2SF 0 "register_operand" "=y")
(smaxmin:V2SF
(match_operand:V2SF 1 "nonimmediate_operand" "%0")
@ -290,7 +290,7 @@
[(set_attr "type" "mmxadd")
(set_attr "mode" "V2SF")])
(define_insn "*<code>v2sf3"
(define_insn "*mmx_<code>v2sf3"
[(set (match_operand:V2SF 0 "register_operand" "=y")
(smaxmin:V2SF
(match_operand:V2SF 1 "register_operand" "0")
@ -600,7 +600,7 @@
"TARGET_MMX || (TARGET_SSE2 && <MODE>mode == V1DImode)"
"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
(define_insn "*<plusminus_insn><mode>3"
(define_insn "*mmx_<plusminus_insn><mode>3"
[(set (match_operand:MMXMODEI8 0 "register_operand" "=y")
(plusminus:MMXMODEI8
(match_operand:MMXMODEI8 1 "nonimmediate_operand" "<comm>0")
@ -619,7 +619,7 @@
"TARGET_MMX"
"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
(define_insn "*<plusminus_insn><mode>3"
(define_insn "*mmx_<plusminus_insn><mode>3"
[(set (match_operand:MMXMODE12 0 "register_operand" "=y")
(sat_plusminus:MMXMODE12
(match_operand:MMXMODE12 1 "nonimmediate_operand" "<comm>0")
@ -636,7 +636,7 @@
"TARGET_MMX"
"ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
(define_insn "*mulv4hi3"
(define_insn "*mmx_mulv4hi3"
[(set (match_operand:V4HI 0 "register_operand" "=y")
(mult:V4HI (match_operand:V4HI 1 "nonimmediate_operand" "%0")
(match_operand:V4HI 2 "nonimmediate_operand" "ym")))]
@ -658,7 +658,7 @@
"TARGET_MMX"
"ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
(define_insn "*smulv4hi3_highpart"
(define_insn "*mmx_smulv4hi3_highpart"
[(set (match_operand:V4HI 0 "register_operand" "=y")
(truncate:V4HI
(lshiftrt:V4SI
@ -686,7 +686,7 @@
"TARGET_SSE || TARGET_3DNOW_A"
"ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
(define_insn "*umulv4hi3_highpart"
(define_insn "*mmx_umulv4hi3_highpart"
[(set (match_operand:V4HI 0 "register_operand" "=y")
(truncate:V4HI
(lshiftrt:V4SI
@ -768,7 +768,7 @@
"TARGET_SSE || TARGET_3DNOW_A"
"ix86_fixup_binary_operands_no_copy (<CODE>, V4HImode, operands);")
(define_insn "*<code>v4hi3"
(define_insn "*mmx_<code>v4hi3"
[(set (match_operand:V4HI 0 "register_operand" "=y")
(smaxmin:V4HI
(match_operand:V4HI 1 "nonimmediate_operand" "%0")
@ -787,7 +787,7 @@
"TARGET_SSE || TARGET_3DNOW_A"
"ix86_fixup_binary_operands_no_copy (<CODE>, V8QImode, operands);")
(define_insn "*<code>v8qi3"
(define_insn "*mmx_<code>v8qi3"
[(set (match_operand:V8QI 0 "register_operand" "=y")
(umaxmin:V8QI
(match_operand:V8QI 1 "nonimmediate_operand" "%0")
@ -878,7 +878,7 @@
"TARGET_MMX"
"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
(define_insn "*<code><mode>3"
(define_insn "*mmx_<code><mode>3"
[(set (match_operand:MMXMODEI 0 "register_operand" "=y")
(plogic:MMXMODEI
(match_operand:MMXMODEI 1 "nonimmediate_operand" "%0")