i386.c (inline_secondary_memory_needed): Return true for moves between SSE and non-general registers and between mask...
* config/i386/i386.c (inline_secondary_memory_needed): Return true for moves between SSE and non-general registers and between mask and non-general registers. (ix86_register_move_cost): Remove stalled comment. From-SVN: r275050
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@ -1,3 +1,10 @@
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2019-08-29 Uroš Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (inline_secondary_memory_needed): Return true
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for moves between SSE and non-general registers and between
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mask and non-general registers.
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(ix86_register_move_cost): Remove stalled comment.
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2019-08-29 Richard Biener <rguenther@suse.de>
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* config/i386/i386-features.c (general_scalar_chain::convert_insn):
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@ -18306,32 +18306,36 @@ inline_secondary_memory_needed (machine_mode mode, reg_class_t class1,
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if (FLOAT_CLASS_P (class1) != FLOAT_CLASS_P (class2))
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return true;
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/* Between mask and general, we have moves no larger than word size. */
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if ((MASK_CLASS_P (class1) != MASK_CLASS_P (class2))
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&& (GET_MODE_SIZE (mode) > UNITS_PER_WORD))
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return true;
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/* ??? This is a lie. We do have moves between mmx/general, and for
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mmx/sse2. But by saying we need secondary memory we discourage the
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register allocator from using the mmx registers unless needed. */
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if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2))
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return true;
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/* Between mask and general, we have moves no larger than word size. */
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if (MASK_CLASS_P (class1) != MASK_CLASS_P (class2))
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{
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if (!(INTEGER_CLASS_P (class1) || INTEGER_CLASS_P (class2))
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|| GET_MODE_SIZE (mode) > UNITS_PER_WORD)
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return true;
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}
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if (SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
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{
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/* SSE1 doesn't have any direct moves from other classes. */
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if (!TARGET_SSE2)
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return true;
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/* Between SSE and general, we have moves no larger than word size. */
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if (!(INTEGER_CLASS_P (class1) || INTEGER_CLASS_P (class2))
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|| GET_MODE_SIZE (mode) > UNITS_PER_WORD)
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return true;
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/* If the target says that inter-unit moves are more expensive
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than moving through memory, then don't generate them. */
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if ((SSE_CLASS_P (class1) && !TARGET_INTER_UNIT_MOVES_FROM_VEC)
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|| (SSE_CLASS_P (class2) && !TARGET_INTER_UNIT_MOVES_TO_VEC))
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return true;
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/* Between SSE and general, we have moves no larger than word size. */
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if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
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return true;
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}
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return false;
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@ -18608,15 +18612,7 @@ ix86_register_move_cost (machine_mode mode, reg_class_t class1_i,
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if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2))
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gcc_unreachable ();
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/* Moves between SSE and integer units are expensive. */
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if (SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
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/* ??? By keeping returned value relatively high, we limit the number
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of moves between integer and SSE registers for all targets.
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Additionally, high value prevents problem with x86_modes_tieable_p(),
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where integer modes in SSE registers are not tieable
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because of missing QImode and HImode moves to, from or between
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MMX/SSE registers. */
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return (SSE_CLASS_P (class1)
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? ix86_cost->hard_register.sse_to_integer
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: ix86_cost->hard_register.integer_to_sse);
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