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arm.h (CLASS_LIKELY_SPILLED_P): Remove.

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* config/arm/arm.h (CLASS_LIKELY_SPILLED_P): Remove.
	* config/arm/arm.c (TARGET_CLASS_LIKELY_SPILLED_P): Define.
	(arm_class_likely_spilled_p): New function.

From-SVN: r164450
This commit is contained in:
Anatoly Sokolov 2010-09-20 23:30:31 +04:00 committed by Anatoly Sokolov
parent 382eb33c14
commit d163e655d5
3 changed files with 26 additions and 7 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2010-09-20 Anatoly Sokolov <aesok@post.ru>
* config/arm/arm.h (CLASS_LIKELY_SPILLED_P): Remove.
* config/arm/arm.c (TARGET_CLASS_LIKELY_SPILLED_P): Define.
(arm_class_likely_spilled_p): New function.
2010-09-20 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_expand_ashl_const): Rewrite using

20
gcc/config/arm/arm.c
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@ -239,6 +239,7 @@ static rtx arm_pic_static_addr (rtx orig, rtx reg);
static bool cortex_a9_sched_adjust_cost (rtx, rtx, rtx, int *);
static bool xscale_sched_adjust_cost (rtx, rtx, rtx, int *);
static unsigned int arm_units_per_simd_word (enum machine_mode);
static bool arm_class_likely_spilled_p (reg_class_t);
/* Table of machine attributes. */
@ -545,6 +546,9 @@ static const struct attribute_spec arm_attribute_table[] =
#undef TARGET_CAN_ELIMINATE
#define TARGET_CAN_ELIMINATE arm_can_eliminate
#undef TARGET_CLASS_LIKELY_SPILLED_P
#define TARGET_CLASS_LIKELY_SPILLED_P arm_class_likely_spilled_p
struct gcc_target targetm = TARGET_INITIALIZER;
/* Obstack for minipool constant handling. */
@ -21952,6 +21956,22 @@ arm_units_per_simd_word (enum machine_mode mode ATTRIBUTE_UNUSED)
? (TARGET_NEON_VECTORIZE_QUAD ? 16 : 8) : UNITS_PER_WORD);
}
/* Implement TARGET_CLASS_LIKELY_SPILLED_P.
We need to define this for LO_REGS on thumb. Otherwise we can end up
using r0-r4 for function arguments, r7 for the stack frame and don't
have enough left over to do doubleword arithmetic. */
static bool
arm_class_likely_spilled_p (reg_class_t rclass)
{
if ((TARGET_THUMB && rclass == LO_REGS)
|| rclass == CC_REG)
return true;
return false;
}
/* Implements target hook small_register_classes_for_mode_p. */
bool
arm_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED)

7
gcc/config/arm/arm.h
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@ -1284,13 +1284,6 @@ enum reg_class
|| reg_classes_intersect_p (VFP_REGS, (CLASS)) \
: 0)
/* We need to define this for LO_REGS on thumb. Otherwise we can end up
using r0-r4 for function arguments, r7 for the stack frame and don't
have enough left over to do doubleword arithmetic. */
#define CLASS_LIKELY_SPILLED_P(CLASS) \
((TARGET_THUMB && (CLASS) == LO_REGS) \
|| (CLASS) == CC_REG)
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS (TARGET_THUMB1 ? LO_REGS : GENERAL_REGS)
#define BASE_REG_CLASS (TARGET_THUMB1 ? LO_REGS : CORE_REGS)