re PR target/61561 (arm gcc internal error)
gcc/ 2014-07-11 Marat Zakirov <m.zakirov@samsung.com> PR target/61561 * config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer. (*movhi_bytes): Likewise. (*arm_movqi_insn): Likewise. gcc/testsuite/ 2014-07-11 Marat Zakirov <m.zakirov@samsung.com> PR target/61561 * gcc.dg/pr61561.c: New test. From-SVN: r212450
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2014-07-11 Marat Zakirov <m.zakirov@samsung.com>
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PR target/61561
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* config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer.
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(*movhi_bytes): Likewise.
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(*arm_movqi_insn): Likewise.
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2014-07-11 Uros Bizjak <ubizjak@gmail.com>
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PR target/56858
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@ -6286,7 +6286,7 @@
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;; Pattern to recognize insn generated default case above
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(define_insn "*movhi_insn_arch4"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
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(match_operand:HI 1 "general_operand" "rI,K,r,mi"))]
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(match_operand:HI 1 "general_operand" "rIk,K,r,mi"))]
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"TARGET_ARM
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&& arm_arch4
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&& (register_operand (operands[0], HImode)
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@ -6310,7 +6310,7 @@
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(define_insn "*movhi_bytes"
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[(set (match_operand:HI 0 "s_register_operand" "=r,r,r")
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(match_operand:HI 1 "arm_rhs_operand" "I,r,K"))]
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(match_operand:HI 1 "arm_rhs_operand" "I,rk,K"))]
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"TARGET_ARM"
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"@
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mov%?\\t%0, %1\\t%@ movhi
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(define_insn "*arm_movqi_insn"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,r,l,Uu,r,m")
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(match_operand:QI 1 "general_operand" "r,r,I,Py,K,Uu,l,m,r"))]
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(match_operand:QI 1 "general_operand" "rk,rk,I,Py,K,Uu,l,m,r"))]
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"TARGET_32BIT
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&& ( register_operand (operands[0], QImode)
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|| register_operand (operands[1], QImode))"
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@ -1,3 +1,8 @@
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2014-07-11 Marat Zakirov <m.zakirov@samsung.com>
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PR target/61561
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* gcc.dg/pr61561.c: New test.
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2014-07-10 Tom de Vries <tom@codesourcery.com>
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* gcc.target/mips/fuse-caller-save.c: Add addressing=absolute to
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@ -0,0 +1,15 @@
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/* PR c/61561. */
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/* { dg-do assemble } */
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/* { dg-options " -w -O2" } */
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int dummy (int a);
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char a;
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short b;
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void mmm (void)
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{
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char dyn[dummy (3)];
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a = (char)&dyn[0];
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b = (short)&dyn[0];
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}
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