sparc.md (mov[sdt]f_const_insn): Fix condition to match what the instruction can handle.
* sparc/sparc.md (mov[sdt]f_const_insn): Fix condition to match what the instruction can handle. From-SVN: r16422
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@ -1,3 +1,8 @@
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Mon Nov 10 16:21:58 1997 Doug Evans <devans@canuck.cygnus.com>
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* sparc/sparc.md (mov[sdt]f_const_insn): Fix condition to match
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what the instruction can handle.
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Mon Nov 10 03:02:19 1997 Jason Merrill <jason@yorick.cygnus.com>
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* stmt.c (expand_decl_cleanup_no_eh): New fn.
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@ -2157,7 +2157,10 @@
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(define_insn "*movsf_const_insn"
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[(set (match_operand:SF 0 "general_operand" "=?r,f,m")
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(match_operand:SF 1 "" "?F,m,G"))]
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"TARGET_FPU && GET_CODE (operands[1]) == CONST_DOUBLE"
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"TARGET_FPU
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&& GET_CODE (operands[1]) == CONST_DOUBLE
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&& (GET_CODE (operands[0]) == REG
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|| fp_zero_operand (operands[1]))"
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"*
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{
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switch (which_alternative)
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@ -2231,7 +2234,10 @@
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(define_insn "*movdf_const_insn"
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[(set (match_operand:DF 0 "general_operand" "=?r,e,o")
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(match_operand:DF 1 "" "?F,m,G"))]
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"TARGET_FPU && GET_CODE (operands[1]) == CONST_DOUBLE"
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"TARGET_FPU
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&& GET_CODE (operands[1]) == CONST_DOUBLE
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&& (GET_CODE (operands[0]) == REG
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|| fp_zero_operand (operands[1]))"
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"*
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{
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switch (which_alternative)
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@ -2349,7 +2355,10 @@
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(define_insn "*movtf_const_insn"
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[(set (match_operand:TF 0 "general_operand" "=?r,e,o")
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(match_operand:TF 1 "" "?F,m,G"))]
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"TARGET_FPU && GET_CODE (operands[1]) == CONST_DOUBLE"
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"TARGET_FPU
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&& GET_CODE (operands[1]) == CONST_DOUBLE
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&& (GET_CODE (operands[0]) == REG
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|| fp_zero_operand (operands[1]))"
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"*
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{
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switch (which_alternative)
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