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m68k.h (EXTRA_CONSTRAINT): add 'U' for register offset addressing. 

* config/m68k/m68k.h(EXTRA_CONSTRAINT): add 'U' for register offset
	addressing.
	* config/m68k/m68k.md: Add 'U,U' alternative to ColdFire variants of
	movsi,movhi,movqi insn patterns.

From-SVN: r82420
This commit is contained in:
Peter Barada 2004-05-29 15:10:41 +00:00 committed by Bernardo Innocenti
parent 803cb0b5c9
commit d1fe6168c0
3 changed files with 22 additions and 8 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2004-05-29 Peter Barada <peter@the-baradas.com>
* config/m68k/m68k.h(EXTRA_CONSTRAINT): add 'U' for register offset
addressing.
* config/m68k/m68k.md: Add 'U,U' alternative to ColdFire variants of
movsi,movhi,movqi insn patterns.
2005-05-28 Andrew Pinski <pinskia@physics.uc.edu>
* c-semantics.c (emit_local_var): Remove code for DECL_INITIAL.

11
gcc/config/m68k/m68k.h
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@ -735,7 +735,8 @@ extern enum reg_class regno_reg_class[];
`Q' means address register indirect addressing mode.
`S' is for operands that satisfy 'm' when -mpcrel is in effect.
`T' is for operands that satisfy 's' when -mpcrel is not in effect. */
`T' is for operands that satisfy 's' when -mpcrel is not in effect.
`U' is for register offset addressing. */
#define EXTRA_CONSTRAINT(OP,CODE) \
(((CODE) == 'S') \
@ -755,7 +756,13 @@ extern enum reg_class regno_reg_class[];
? (GET_CODE (OP) == MEM \
&& GET_CODE (XEXP (OP, 0)) == REG) \
: \
0)))
(((CODE) == 'U') \
? (GET_CODE (OP) == MEM \
&& GET_CODE (XEXP (OP, 0)) == PLUS \
&& GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
&& GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT) \
: \
0))))
/* Given an rtx X being reloaded into a reg required to be
in class CLASS, return the class of reg to actually use.

12
gcc/config/m68k/m68k.md
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@ -676,8 +676,8 @@
})
(define_insn ""
[(set (match_operand:SI 0 "nonimmediate_operand" "=r<Q>,g")
(match_operand:SI 1 "general_operand" "g,r<Q>"))]
[(set (match_operand:SI 0 "nonimmediate_operand" "=r<Q>,g,U")
(match_operand:SI 1 "general_operand" "g,r<Q>,U"))]
"TARGET_COLDFIRE"
"* return output_move_simode (operands);")
@ -706,8 +706,8 @@
"* return output_move_himode (operands);")
(define_insn ""
[(set (match_operand:HI 0 "nonimmediate_operand" "=r<Q>,g")
(match_operand:HI 1 "general_operand" "g,r<Q>"))]
[(set (match_operand:HI 0 "nonimmediate_operand" "=r<Q>,g,U")
(match_operand:HI 1 "general_operand" "g,r<Q>,U"))]
"TARGET_COLDFIRE"
"* return output_move_himode (operands);")
@ -742,8 +742,8 @@
"* return output_move_qimode (operands);")
(define_insn ""
[(set (match_operand:QI 0 "nonimmediate_operand" "=d<Q>,dm,d*a")
(match_operand:QI 1 "general_src_operand" "dmi,d<Q>,di*a"))]
[(set (match_operand:QI 0 "nonimmediate_operand" "=d<Q>,dm,U,d*a")
(match_operand:QI 1 "general_src_operand" "dmi,d<Q>,U,di*a"))]
"TARGET_COLDFIRE"
"* return output_move_qimode (operands);")