re PR target/42774 (ICE in get_aligned_mem, at config/alpha/alpha.c:1484)
PR target/42774 * config/alpha/predicates.md (aligned_memory_operand): Return 0 for memory references with unaligned offsets. Remove CQImode handling. (unaligned_memory_operand): Return 1 for memory references with unaligned offsets. Remove CQImode handling. testsuite/ChangeLog: PR target/42774 * gcc.target/alpha/pr42774.c: New test. From-SVN: r156014
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@ -1,3 +1,11 @@
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2010-01-18 Uros Bizjak <ubizjak@gmail.com>
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PR target/42774
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* config/alpha/predicates.md (aligned_memory_operand): Return 0 for
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memory references with unaligned offsets. Remove CQImode handling.
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(unaligned_memory_operand): Return 1 for memory references with
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unaligned offsets. Remove CQImode handling.
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2010-01-17 H.J. Lu <hongjiu.lu@intel.com>
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Backport from mainline:
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@ -74,7 +82,7 @@
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* Backport from mainline
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2010-01-12 Julian Brown <julian@codesourcery.com>
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* config/arm/neon-schedgen.ml (Utils): Don't try to
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open missing module.
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(find_with_result): New.
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@ -96,7 +104,7 @@
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2010-01-07 H.J. Lu <hongjiu.lu@intel.com>
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Backport from mainline
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2010-01-05 Paolo Bonzini <bonzinI@gnu.rg>
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2010-01-05 Paolo Bonzini <bonzini@gnu.org>
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H.J. Lu <hongjiu.lu@intel.com>
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PR target/42542
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@ -439,13 +439,11 @@
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(match_code "mem"))
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{
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rtx base;
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int offset;
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if (MEM_ALIGN (op) >= 32)
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return 1;
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if (mode == CQImode)
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return 0;
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op = XEXP (op, 0);
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/* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo)
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@ -453,14 +451,29 @@
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if (reload_in_progress
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&& GET_CODE (op) == PLUS
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&& GET_CODE (XEXP (op, 0)) == PLUS)
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base = XEXP (XEXP (op, 0), 0);
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{
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base = XEXP (XEXP (op, 0), 0);
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offset = INTVAL (XEXP (op, 1));
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}
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else
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{
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if (! memory_address_p (mode, op))
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return 0;
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base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
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if (GET_CODE (op) == PLUS)
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{
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base = XEXP (op, 0);
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offset = INTVAL (XEXP (op, 1));
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}
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else
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{
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base = op;
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offset = 0;
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}
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}
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if (offset % GET_MODE_SIZE (mode))
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return 0;
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return (GET_CODE (base) == REG && REGNO_POINTER_ALIGN (REGNO (base)) >= 32);
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})
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@ -471,13 +484,11 @@
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(match_code "mem"))
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{
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rtx base;
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int offset;
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if (MEM_ALIGN (op) >= 32)
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return 0;
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if (mode == CQImode)
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return 1;
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op = XEXP (op, 0);
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/* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo)
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@ -485,14 +496,29 @@
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if (reload_in_progress
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&& GET_CODE (op) == PLUS
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&& GET_CODE (XEXP (op, 0)) == PLUS)
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base = XEXP (XEXP (op, 0), 0);
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{
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base = XEXP (XEXP (op, 0), 0);
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offset = INTVAL (XEXP (op, 1));
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}
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else
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{
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if (! memory_address_p (mode, op))
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return 0;
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base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
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if (GET_CODE (op) == PLUS)
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{
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base = XEXP (op, 0);
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offset = INTVAL (XEXP (op, 1));
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}
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else
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{
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base = op;
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offset = 0;
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}
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}
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if (offset % GET_MODE_SIZE (mode))
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return 1;
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return (GET_CODE (base) == REG && REGNO_POINTER_ALIGN (REGNO (base)) < 32);
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})
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@ -1,3 +1,8 @@
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2010-01-18 Uros Bizjak <ubizjak@gmail.com>
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PR target/42774
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* gcc.target/alpha/pr42774.c: New test.
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2010-01-17 H.J. Lu <hongjiu.lu@intel.com>
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Backport from mainline:
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@ -0,0 +1,10 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -mcpu=ev4" } */
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unsigned int ntfs_getinfo(void *p)
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{
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char bootsect[8];
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__builtin_memcpy(bootsect, p, sizeof bootsect);
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return *(unsigned short *)(bootsect + 3);
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}
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