From d2c6a1b6284b96e1a5427881c1e18acfd8082d1e Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 27 May 2000 13:34:12 -0700 Subject: [PATCH] alpha.c (hard_fp_register_operand): Mind the mode. * config/alpha/alpha.c (hard_fp_register_operand): Mind the mode. (hard_int_register_operand): New. * config/alpha/alpha-protos.h: Declare it. * config/alpha/alpha.h (PREDICATE_CODES): Update. * config/alpha/alpha.md (peep2 patterns): Use hard_int_register_operand as needed; use peep2_reg_dead_p instead of dead_or_set_p. From-SVN: r34209 --- gcc/ChangeLog | 7 +++++++ gcc/config/alpha/alpha-protos.h | 1 + gcc/config/alpha/alpha.c | 24 +++++++++++++++++++++--- gcc/config/alpha/alpha.h | 1 + gcc/config/alpha/alpha.md | 29 +++++++++++++++++++++-------- 5 files changed, 51 insertions(+), 11 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b8c478e72e3..38306c82712 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -27,6 +27,13 @@ * config/i386/i386.md (all peepholes): Use peep2_regno_dead_p. + * config/alpha/alpha.c (hard_fp_register_operand): Mind the mode. + (hard_int_register_operand): New. + * config/alpha/alpha-protos.h: Declare it. + * config/alpha/alpha.h (PREDICATE_CODES): Update. + * config/alpha/alpha.md (peep2 patterns): Use hard_int_register_operand + as needed; use peep2_reg_dead_p instead of dead_or_set_p. + 2000-05-27 Richard Henderson * function.c (thread_prologue_epilogue_insns): Don't move the diff --git a/gcc/config/alpha/alpha-protos.h b/gcc/config/alpha/alpha-protos.h index d4a6b65fe87..41c4187c5d6 100644 --- a/gcc/config/alpha/alpha-protos.h +++ b/gcc/config/alpha/alpha-protos.h @@ -49,6 +49,7 @@ extern int mul8_operand PARAMS ((rtx, enum machine_mode)); extern int fp0_operand PARAMS ((rtx, enum machine_mode)); extern int reg_or_fp0_operand PARAMS ((rtx, enum machine_mode)); extern int hard_fp_register_operand PARAMS ((rtx, enum machine_mode)); +extern int hard_int_register_operand PARAMS ((rtx, enum machine_mode)); extern int reg_or_cint_operand PARAMS ((rtx, enum machine_mode)); extern int some_operand PARAMS ((rtx, enum machine_mode)); extern int some_ni_operand PARAMS ((rtx, enum machine_mode)); diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 41f7f6c5bfe..f467c45b2b8 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -562,9 +562,27 @@ hard_fp_register_operand (op, mode) register rtx op; enum machine_mode mode; { - return ((GET_CODE (op) == REG && REGNO_REG_CLASS (REGNO (op)) == FLOAT_REGS) - || (GET_CODE (op) == SUBREG - && hard_fp_register_operand (SUBREG_REG (op), mode))); + if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) + return 0; + + if (GET_CODE (op) == SUBREG) + op = SUBREG_REG (op); + return GET_CODE (op) == REG && REGNO_REG_CLASS (REGNO (op)) == FLOAT_REGS; +} + +/* Return 1 if OP is a hard general register. */ + +int +hard_int_register_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) + return 0; + + if (GET_CODE (op) == SUBREG) + op = SUBREG_REG (op); + return GET_CODE (op) == REG && REGNO_REG_CLASS (REGNO (op)) == GENERAL_REGS; } /* Return 1 if OP is a register or a constant integer. */ diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 2d9be06f17f..a362bb86c74 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -2347,6 +2347,7 @@ do { \ {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \ {"any_memory_operand", {MEM}}, \ {"hard_fp_register_operand", {SUBREG, REG}}, \ + {"hard_int_register_operand", {SUBREG, REG}}, \ {"reg_not_elim_operand", {SUBREG, REG}}, \ {"reg_no_subreg_operand", {REG}}, \ {"addition_operation", {PLUS}}, diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index f1c1340f726..520c2e09904 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -5869,21 +5869,34 @@ ;; reload when converting fp->int. (define_peephole2 - [(set (match_operand:SI 0 "register_operand" "=r") - (match_operand:SI 1 "memory_operand" "m")) - (set (match_operand:DI 2 "register_operand" "=r") + [(set (match_operand:SI 0 "hard_int_register_operand" "") + (match_operand:SI 1 "memory_operand" "")) + (set (match_operand:DI 2 "hard_int_register_operand" "") (sign_extend:DI (match_dup 0)))] - "dead_or_set_p (next_nonnote_insn (insn), operands[0])" + "true_regnum (operands[0]) == true_regnum (operands[2]) + || peep2_reg_dead_p (2, operands[0])" [(set (match_dup 2) (sign_extend:DI (match_dup 1)))] "") (define_peephole2 - [(set (match_operand:SI 0 "register_operand" "=r") - (match_operand:SI 1 "hard_fp_register_operand" "f")) - (set (match_operand:DI 2 "register_operand" "=r") + [(set (match_operand:SI 0 "hard_int_register_operand" "") + (match_operand:SI 1 "hard_fp_register_operand" "")) + (set (match_operand:DI 2 "hard_int_register_operand" "") (sign_extend:DI (match_dup 0)))] - "TARGET_FIX && dead_or_set_p (next_nonnote_insn (insn), operands[0])" + "TARGET_FIX + && (true_regnum (operands[0]) == true_regnum (operands[2]) + || peep2_reg_dead_p (2, operands[0]))" + [(set (match_dup 2) + (sign_extend:DI (match_dup 1)))] + "") + +(define_peephole2 + [(set (match_operand:DI 0 "hard_fp_register_operand" "") + (sign_extend:DI (match_operand:SI 1 "hard_fp_register_operand" ""))) + (set (match_operand:DI 2 "hard_int_register_operand" "") + (match_dup 0))] + "TARGET_FIX && peep2_reg_dead_p (2, operands[0])" [(set (match_dup 2) (sign_extend:DI (match_dup 1)))] "")