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mips.md (*mov<mode>_internal, [...]): Adjust constraints for microMIPS store patterns. 

2014-04-16  Catherine Moore  <clm@codesourcery.com>

	gcc/
	* mips.md (*mov<mode>_internal, *movhi_internal, *movqi_internal):
	Adjust constraints for microMIPS store patterns.

	testsuite/
	* gcc.target/mips/umips-store16-2.c: New test.

From-SVN: r209450
This commit is contained in:
Catherine Moore 2014-04-16 17:09:30 -04:00 committed by Catherine Moore
parent fcde53d03f
commit d2dfaca3b8
4 changed files with 34 additions and 3 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2014-04-16 Catherine Moore <clm@codesourcery.com>
* mips.md (*mov<mode>_internal, *movhi_internal, *movqi_internal):
Adjust constraints for microMIPS store patterns.
2014-04-16 Pitchumani Sivanupandi <Pitchumani.S@atmel.com>
* config/avr/avr-mcus.def: Correct typo for atxmega256a3bu macro.

6
gcc/config/mips/mips.md
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@ -4437,7 +4437,7 @@
(define_insn "*mov<mode>_internal"
[(set (match_operand:IMOVE32 0 "nonimmediate_operand" "=d,!u,!u,d,e,!u,!ks,d,ZS,ZT,m,*f,*f,*d,*m,*d,*z,*a,*d,*B*C*D,*B*C*D,*d,*m")
(match_operand:IMOVE32 1 "move_operand" "d,J,Udb7,Yd,Yf,ZT,ZS,m,!ks,!kb,dJ,*d*J,*m,*f,*f,*z,*d,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
(match_operand:IMOVE32 1 "move_operand" "d,J,Udb7,Yd,Yf,ZT,ZS,m,!ks,!kbJ,dJ,*d*J,*m,*f,*f,*z,*d,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
"!TARGET_MIPS16
&& (register_operand (operands[0], <MODE>mode)
|| reg_or_0_operand (operands[1], <MODE>mode))"
@ -4578,7 +4578,7 @@
(define_insn "*movhi_internal"
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,!u,d,!u,d,ZU,m,*a,*d")
(match_operand:HI 1 "move_operand" "d,J,I,ZU,m,!kb,dJ,*d*J,*a"))]
(match_operand:HI 1 "move_operand" "d,J,I,ZU,m,!kbJ,dJ,*d*J,*a"))]
"!TARGET_MIPS16
&& (register_operand (operands[0], HImode)
|| reg_or_0_operand (operands[1], HImode))"
@ -4654,7 +4654,7 @@
(define_insn "*movqi_internal"
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,!u,d,!u,d,ZV,m,*a,*d")
(match_operand:QI 1 "move_operand" "d,J,I,ZW,m,!kb,dJ,*d*J,*a"))]
(match_operand:QI 1 "move_operand" "d,J,I,ZW,m,!kbJ,dJ,*d*J,*a"))]
"!TARGET_MIPS16
&& (register_operand (operands[0], QImode)
|| reg_or_0_operand (operands[1], QImode))"

4
gcc/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2014-04-16 Catherine Moore <clm@codesourcery.com>
* gcc.target/mips/umips-store16-2.c: New test.
2014-04-16 Marc Glisse <marc.glisse@inria.fr>
* g++.dg/cpp0x/initlist-vect.C: New file.

22
gcc/testsuite/gcc.target/mips/umips-store16-2.c Normal file
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@ -0,0 +1,22 @@
/* { dg-options "(-mmicromips) -dp" } */
MICROMIPS void
f1 (unsigned char *ptr)
{
*ptr = 0;
}
MICROMIPS void
f2 (unsigned short *ptr)
{
*ptr = 0;
}
MICROMIPS void
f3 (unsigned int *ptr)
{
*ptr = 0;
}
/* { dg-final { scan-assembler "\tsb\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */
/* { dg-final { scan-assembler "\tsh\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */
/* { dg-final { scan-assembler "\tsw\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */