md.texi (Defining Attributes): Document that we are defining HAVE_ATTR_name macors as 1 for defined attributes...

* doc/md.texi (Defining Attributes): Document that we are defining
	HAVE_ATTR_name macors as 1 for defined attributes, and as 0
	for undefined special attributes.
	* final.c (asm_insn_count, align_fuzz): Always define.
	(insn_current_reference_address): Likewise.
	(init_insn_lengths): Use if (HAVE_ATTR_length) instead of
	#ifdef HAVE_ATTR_length.
	(get_attr_length_1, shorten_branches, final): Likewise.
	(final_scan_insn, output_asm_name): Likewise.
	* genattr.c (gen_attr): Define HAVE_ATTR_name macros for
	defined attributes as 1.
	Remove ancient get_attr_alternative compatibility code.
	For special purpose attributes not provided, define HAVE_ATTR_name
	as 0.
	In case no length attribute is given, provide stub definitions
	for insn_*_length* functions, and also include insn-addr.h.
	In case no enabled attribute is given, provide stub definition.
	* genattrtab.c (write_length_unit_log): Always write a definition.
	* hooks.c (hook_int_rtx_1, hook_int_rtx_unreachable): New functions.
	* hooks.h (hook_int_rtx_1, hook_int_rtx_unreachable): Declare.
	* lra-int.h (struct lra_insn_recog_data): Make member
	alternative_enabled_p unconditional.
	* lra.c (free_insn_recog_data): Use if (HAVE_ATTR_length) instead of
	#ifdef HAVE_ATTR_length.
	(lra_set_insn_recog_data): Likewise.  Make initialization of
	alternative_enabled_p unconditional.
	(lra_update_insn_recog_data): Use #if instead of #ifdef for
	HAVE_ATTR_enabled.
	* recog.c [!HAVE_ATTR_enabled] (get_attr_enabled): Don't define.
	(extract_insn): Check HAVE_ATTR_enabled.
	(gate_handle_split_before_regstack): Use #if instead of
	#if defined for HAVE_ATTR_length.

From-SVN: r193168
This commit is contained in:
Joern Rennecke 2012-11-05 15:18:10 +00:00 committed by Joern Rennecke
parent 1539ccbf52
commit d327457f17
10 changed files with 140 additions and 102 deletions

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@ -1,3 +1,38 @@
2012-11-05 Joern Rennecke <joern.rennecke@embecosm.com>
* doc/md.texi (Defining Attributes): Document that we are defining
HAVE_ATTR_name macors as 1 for defined attributes, and as 0
for undefined special attributes.
* final.c (asm_insn_count, align_fuzz): Always define.
(insn_current_reference_address): Likewise.
(init_insn_lengths): Use if (HAVE_ATTR_length) instead of
#ifdef HAVE_ATTR_length.
(get_attr_length_1, shorten_branches, final): Likewise.
(final_scan_insn, output_asm_name): Likewise.
* genattr.c (gen_attr): Define HAVE_ATTR_name macros for
defined attributes as 1.
Remove ancient get_attr_alternative compatibility code.
For special purpose attributes not provided, define HAVE_ATTR_name
as 0.
In case no length attribute is given, provide stub definitions
for insn_*_length* functions, and also include insn-addr.h.
In case no enabled attribute is given, provide stub definition.
* genattrtab.c (write_length_unit_log): Always write a definition.
* hooks.c (hook_int_rtx_1, hook_int_rtx_unreachable): New functions.
* hooks.h (hook_int_rtx_1, hook_int_rtx_unreachable): Declare.
* lra-int.h (struct lra_insn_recog_data): Make member
alternative_enabled_p unconditional.
* lra.c (free_insn_recog_data): Use if (HAVE_ATTR_length) instead of
#ifdef HAVE_ATTR_length.
(lra_set_insn_recog_data): Likewise. Make initialization of
alternative_enabled_p unconditional.
(lra_update_insn_recog_data): Use #if instead of #ifdef for
HAVE_ATTR_enabled.
* recog.c [!HAVE_ATTR_enabled] (get_attr_enabled): Don't define.
(extract_insn): Check HAVE_ATTR_enabled.
(gate_handle_split_before_regstack): Use #if instead of
#if defined for HAVE_ATTR_length.
2012-11-05 Jan Hubicka <jh@suse.cz>
* ipa-inline.c (compute_uninlined_call_time,

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@ -7566,7 +7566,7 @@ For example, if the following is present in the @file{md} file:
the following lines will be written to the file @file{insn-attr.h}.
@smallexample
#define HAVE_ATTR_type
#define HAVE_ATTR_type 1
enum attr_type @{TYPE_BRANCH, TYPE_FP, TYPE_LOAD,
TYPE_STORE, TYPE_ARITH@};
extern enum attr_type get_attr_type ();
@ -7591,6 +7591,10 @@ alternatives of an insn definition from being used during code
generation. @xref{Disable Insn Alternatives}.
@end table
For each of these special attributes, the corresponding
@samp{HAVE_ATTR_@var{name}} @samp{#define} is also written when the
attribute is not defined; in that case, it is defined as @samp{0}.
@findex define_enum_attr
@anchor{define_enum_attr}
Another way of defining an attribute is to use:

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@ -204,9 +204,7 @@ rtx current_insn_predicate;
/* True if printing into -fdump-final-insns= dump. */
bool final_insns_dump_p;
#ifdef HAVE_ATTR_length
static int asm_insn_count (rtx);
#endif
static void profile_function (FILE *);
static void profile_after_prologue (FILE *);
static bool notice_source_line (rtx, bool *);
@ -224,9 +222,7 @@ static int alter_cond (rtx);
#ifndef ADDR_VEC_ALIGN
static int final_addr_vec_align (rtx);
#endif
#ifdef HAVE_ATTR_length
static int align_fuzz (rtx, rtx, int, unsigned);
#endif
/* Initialize data in final at the beginning of a compilation. */
@ -362,9 +358,8 @@ init_insn_lengths (void)
insn_lengths = 0;
insn_lengths_max_uid = 0;
}
#ifdef HAVE_ATTR_length
INSN_ADDRESSES_FREE ();
#endif
if (HAVE_ATTR_length)
INSN_ADDRESSES_FREE ();
if (uid_align)
{
free (uid_align);
@ -376,14 +371,15 @@ init_insn_lengths (void)
get its actual length. Otherwise, use FALLBACK_FN to calculate the
length. */
static inline int
get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx))
{
#ifdef HAVE_ATTR_length
rtx body;
int i;
int length = 0;
if (!HAVE_ATTR_length)
return 0;
if (insn_lengths_max_uid > INSN_UID (insn))
return insn_lengths[INSN_UID (insn)];
else
@ -432,11 +428,6 @@ get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
ADJUST_INSN_LENGTH (insn, length);
#endif
return length;
#else /* not HAVE_ATTR_length */
return 0;
#define insn_default_length 0
#define insn_min_length 0
#endif /* not HAVE_ATTR_length */
}
/* Obtain the current length of an insn. If branch shortening has been done,
@ -583,7 +574,6 @@ label_to_max_skip (rtx label)
return 0;
}
#ifdef HAVE_ATTR_length
/* The differences in addresses
between a branch and its target might grow or shrink depending on
the alignment the start insn of the range (the branch for a forward
@ -686,7 +676,6 @@ insn_current_reference_address (rtx branch)
+ align_fuzz (dest, seq, length_unit_log, ~0));
}
}
#endif /* HAVE_ATTR_length */
/* Compute branch alignments based on frequency information in the
CFG. */
@ -851,14 +840,13 @@ struct rtl_opt_pass pass_compute_alignments =
slots. */
void
shorten_branches (rtx first ATTRIBUTE_UNUSED)
shorten_branches (rtx first)
{
rtx insn;
int max_uid;
int i;
int max_log;
int max_skip;
#ifdef HAVE_ATTR_length
#define MAX_CODE_ALIGN 16
rtx seq;
int something_changed = 1;
@ -867,8 +855,6 @@ shorten_branches (rtx first ATTRIBUTE_UNUSED)
int uid;
rtx align_tab[MAX_CODE_ALIGN];
#endif
/* Compute maximum UID and allocate label_align / uid_shuid. */
max_uid = get_max_uid ();
@ -975,7 +961,8 @@ shorten_branches (rtx first ATTRIBUTE_UNUSED)
}
}
}
#ifdef HAVE_ATTR_length
if (!HAVE_ATTR_length)
return;
/* Allocate the rest of the arrays. */
insn_lengths = XNEWVEC (int, max_uid);
@ -1421,11 +1408,8 @@ shorten_branches (rtx first ATTRIBUTE_UNUSED)
}
free (varying_length);
#endif /* HAVE_ATTR_length */
}
#ifdef HAVE_ATTR_length
/* Given the body of an INSN known to be generated by an ASM statement, return
the number of machine instructions likely to be generated for this insn.
This is used to compute its length. */
@ -1442,7 +1426,6 @@ asm_insn_count (rtx body)
return asm_str_count (templ);
}
#endif
/* Return the number of machine instructions likely to be generated for the
inline-asm template. */
@ -1903,17 +1886,18 @@ final (rtx first, FILE *file, int optimize_p)
/* Output the insns. */
for (insn = first; insn;)
{
#ifdef HAVE_ATTR_length
if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
if (HAVE_ATTR_length)
{
/* This can be triggered by bugs elsewhere in the compiler if
new insns are created after init_insn_lengths is called. */
gcc_assert (NOTE_P (insn));
insn_current_address = -1;
if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
{
/* This can be triggered by bugs elsewhere in the compiler if
new insns are created after init_insn_lengths is called. */
gcc_assert (NOTE_P (insn));
insn_current_address = -1;
}
else
insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
}
else
insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
#endif /* HAVE_ATTR_length */
dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
bb_map_size, &bb_seqn);
@ -2854,12 +2838,10 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
if (new_rtx == insn && PATTERN (new_rtx) == body)
fatal_insn ("could not split insn", insn);
#ifdef HAVE_ATTR_length
/* This instruction should have been split in shorten_branches,
to ensure that we would have valid length info for the
splitees. */
gcc_unreachable ();
#endif
/* If we have a length attribute, this instruction should have
been split in shorten_branches, to ensure that we would have
valid length info for the splitees. */
gcc_assert (!HAVE_ATTR_length);
return new_rtx;
}
@ -3293,10 +3275,11 @@ output_asm_name (void)
insn_data[num].name);
if (insn_data[num].n_alternatives > 1)
fprintf (asm_out_file, "/%d", which_alternative + 1);
#ifdef HAVE_ATTR_length
fprintf (asm_out_file, "\t[length = %d]",
get_attr_length (debug_insn));
#endif
if (HAVE_ATTR_length)
fprintf (asm_out_file, "\t[length = %d]",
get_attr_length (debug_insn));
/* Clear this so only the first assembler insn
of any rtl insn will get the special comment for -dp. */
debug_insn = 0;

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@ -44,7 +44,7 @@ gen_attr (rtx attr)
if (is_const)
VEC_safe_push (rtx, heap, const_attrs, attr);
printf ("#define HAVE_ATTR_%s\n", XSTR (attr, 0));
printf ("#define HAVE_ATTR_%s 1\n", XSTR (attr, 0));
/* If numeric attribute, don't need to write an enum. */
if (GET_CODE (attr) == DEFINE_ENUM_ATTR)
@ -159,12 +159,6 @@ main (int argc, char **argv)
puts ("#include \"insn-attr-common.h\"\n");
/* For compatibility, define the attribute `alternative', which is just
a reference to the variable `which_alternative'. */
puts ("#define HAVE_ATTR_alternative");
puts ("#define get_attr_alternative(insn) which_alternative");
/* Read the machine description. */
while (1)
@ -342,6 +336,29 @@ main (int argc, char **argv)
printf ("typedef void *state_t;\n\n");
}
/* Special-purpose atributes should be tested with if, not #ifdef. */
const char * const special_attrs[] = { "length", "enabled", 0 };
for (const char * const *p = special_attrs; *p; p++)
{
printf ("#ifndef HAVE_ATTR_%s\n"
"#define HAVE_ATTR_%s 0\n"
"#endif\n", *p, *p);
}
/* We make an exception here to provide stub definitions for
insn_*_length* / get_attr_enabled functions. */
puts ("#if !HAVE_ATTR_length\n"
"extern int hook_int_rtx_unreachable (rtx);\n"
"#define insn_default_length hook_int_rtx_unreachable\n"
"#define insn_min_length hook_int_rtx_unreachable\n"
"#define insn_variable_length_p hook_int_rtx_unreachable\n"
"#define insn_current_length hook_int_rtx_unreachable\n"
"#include \"insn-addr.h\"\n"
"#endif\n"
"#if !HAVE_ATTR_enabled\n"
"extern int hook_int_rtx_1 (rtx);\n"
"#define get_attr_enabled hook_int_rtx_1\n"
"#endif\n");
/* Output flag masks for use by reorg.
Flags are used to hold branch direction for use by eligible_for_... */

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@ -1636,14 +1636,15 @@ write_length_unit_log (FILE *outf)
unsigned int length_unit_log, length_or;
int unknown = 0;
if (length_attr == 0)
return;
length_or = or_attr_value (length_attr->default_val->value, &unknown);
for (av = length_attr->first_value; av; av = av->next)
for (ie = av->first_insn; ie; ie = ie->next)
length_or |= or_attr_value (av->value, &unknown);
if (length_attr)
{
length_or = or_attr_value (length_attr->default_val->value, &unknown);
for (av = length_attr->first_value; av; av = av->next)
for (ie = av->first_insn; ie; ie = ie->next)
length_or |= or_attr_value (av->value, &unknown);
}
if (unknown)
if (length_attr == NULL || unknown)
length_unit_log = 0;
else
{

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@ -202,6 +202,18 @@ hook_int_rtx_0 (rtx a ATTRIBUTE_UNUSED)
return 0;
}
int
hook_int_rtx_1 (rtx)
{
return 1;
}
int
hook_int_rtx_unreachable (rtx)
{
gcc_unreachable ();
}
int
hook_int_rtx_bool_0 (rtx a ATTRIBUTE_UNUSED, bool b ATTRIBUTE_UNUSED)
{

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@ -75,6 +75,8 @@ extern int hook_int_uint_mode_1 (unsigned int, enum machine_mode);
extern int hook_int_const_tree_0 (const_tree);
extern int hook_int_const_tree_const_tree_1 (const_tree, const_tree);
extern int hook_int_rtx_0 (rtx);
extern int hook_int_rtx_1 (rtx);
extern int hook_int_rtx_unreachable (rtx);
extern int hook_int_rtx_bool_0 (rtx, bool);
extern int hook_int_rtx_mode_as_bool_0 (rtx, enum machine_mode, addr_space_t,
bool);

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@ -227,10 +227,8 @@ struct lra_insn_recog_data
value can be NULL or points to array of the hard register numbers
ending with a negative value. */
int *arg_hard_regs;
#ifdef HAVE_ATTR_enabled
/* Alternative enabled for the insn. NULL for debug insns. */
bool *alternative_enabled_p;
#endif
/* The alternative should be used for the insn, -1 if invalid, or we
should try to use any alternative, or the insn is a debug
insn. */

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@ -671,10 +671,8 @@ free_insn_recog_data (lra_insn_recog_data_t data)
free (data->dup_loc);
if (data->arg_hard_regs != NULL)
free (data->arg_hard_regs);
#ifdef HAVE_ATTR_enabled
if (data->alternative_enabled_p != NULL)
if (HAVE_ATTR_enabled && data->alternative_enabled_p != NULL)
free (data->alternative_enabled_p);
#endif
if (data->icode < 0 && NONDEBUG_INSN_P (data->insn))
{
if (data->insn_static_data->operand_alternative != NULL)
@ -1020,9 +1018,7 @@ lra_set_insn_recog_data (rtx insn)
data->insn_static_data = &debug_insn_static_data;
data->dup_loc = NULL;
data->arg_hard_regs = NULL;
#ifdef HAVE_ATTR_enabled
data->alternative_enabled_p = NULL;
#endif
data->operand_loc = XNEWVEC (rtx *, 1);
data->operand_loc[0] = &INSN_VAR_LOCATION_LOC (insn);
return data;
@ -1075,9 +1071,7 @@ lra_set_insn_recog_data (rtx insn)
= (insn_static_data->operand[i].constraint[0] == '=' ? OP_OUT
: insn_static_data->operand[i].constraint[0] == '+' ? OP_INOUT
: OP_IN);
#ifdef HAVE_ATTR_enabled
data->alternative_enabled_p = NULL;
#endif
}
else
{
@ -1104,28 +1098,27 @@ lra_set_insn_recog_data (rtx insn)
memcpy (locs, recog_data.dup_loc, n * sizeof (rtx *));
}
data->dup_loc = locs;
#ifdef HAVE_ATTR_enabled
{
bool *bp;
if (HAVE_ATTR_enabled)
{
bool *bp;
n = insn_static_data->n_alternatives;
lra_assert (n >= 0);
data->alternative_enabled_p = bp = XNEWVEC (bool, n);
/* Cache the insn because we don't want to call extract_insn
from get_attr_enabled as extract_insn modifies
which_alternative. The attribute enabled should not depend
on insn operands, operand modes, operand types, and operand
constraints. It should depend on the architecture. If it
is not true, we should rewrite this file code to use
extract_insn instead of less expensive insn_extract. */
recog_data.insn = insn;
for (i = 0; i < n; i++)
{
which_alternative = i;
bp[i] = get_attr_enabled (insn);
}
}
#endif
n = insn_static_data->n_alternatives;
lra_assert (n >= 0);
data->alternative_enabled_p = bp = XNEWVEC (bool, n);
/* Cache the insn because we don't want to call extract_insn
from get_attr_enabled as extract_insn modifies
which_alternative. The attribute enabled should not depend
on insn operands, operand modes, operand types, and operand
constraints. It should depend on the architecture. If it
is not true, we should rewrite this file code to use
extract_insn instead of less expensive insn_extract. */
recog_data.insn = insn;
for (i = 0; i < n; i++)
{
which_alternative = i;
bp[i] = get_attr_enabled (insn);
}
}
}
if (GET_CODE (PATTERN (insn)) == CLOBBER || GET_CODE (PATTERN (insn)) == USE)
insn_static_data->hard_regs = NULL;
@ -1305,7 +1298,7 @@ lra_update_insn_recog_data (rtx insn)
n = insn_static_data->n_dups;
if (n != 0)
memcpy (data->dup_loc, recog_data.dup_loc, n * sizeof (rtx *));
#ifdef HAVE_ATTR_enabled
#if HAVE_ATTR_enabled
#ifdef ENABLE_CHECKING
{
int i;

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@ -57,14 +57,6 @@ along with GCC; see the file COPYING3. If not see
#endif
#endif
#ifndef HAVE_ATTR_enabled
static inline bool
get_attr_enabled (rtx insn ATTRIBUTE_UNUSED)
{
return true;
}
#endif
static void validate_replace_rtx_1 (rtx *, rtx, rtx, rtx, bool);
static void validate_replace_src_1 (rtx *, void *);
static rtx split_insn (rtx);
@ -2172,7 +2164,8 @@ extract_insn (rtx insn)
for (i = 0; i < recog_data.n_alternatives; i++)
{
which_alternative = i;
recog_data.alternative_enabled_p[i] = get_attr_enabled (insn);
recog_data.alternative_enabled_p[i]
= HAVE_ATTR_enabled ? get_attr_enabled (insn) : 0;
}
}
@ -3819,7 +3812,7 @@ struct rtl_opt_pass pass_split_after_reload =
static bool
gate_handle_split_before_regstack (void)
{
#if defined (HAVE_ATTR_length) && defined (STACK_REGS)
#if HAVE_ATTR_length && defined (STACK_REGS)
/* If flow2 creates new instructions which need splitting
and scheduling after reload is not done, they might not be
split until final which doesn't allow splitting
@ -3905,7 +3898,7 @@ struct rtl_opt_pass pass_split_before_sched2 =
static bool
gate_do_final_split (void)
{
#if defined (HAVE_ATTR_length) && !defined (STACK_REGS)
#if HAVE_ATTR_length && !defined (STACK_REGS)
return 1;
#else
return 0;