The main function for epilogue RTL generation, used by expand epilogue
patterns.
gcc/
2012-06-18 Ian Bolton <ian.bolton@arm.com>
Sameera Deshpande <sameera.deshpande@arm.com>
Greta Yorsh <greta.yorsh@arm.com>
* config/arm/arm-protos.h (arm_expand_epilogue): New declaration.
* config/arm/arm.c (arm_expand_epilogue): New function.
* config/arm/arm.md (epilogue): Update condition and code.
(sibcall_epilogue): Likewise.
Co-Authored-By: Greta Yorsh <greta.yorsh@arm.com>
Co-Authored-By: Sameera Deshpande <sameera.deshpande@arm.com>
From-SVN: r188742
This commit is contained in:
Ian Bolton
Greta Yorsh
parent
0f9926f367
commit
d461c88a25
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@ -1,3 +1,12 @@
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2012-06-18 Ian Bolton <ian.bolton@arm.com>
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Sameera Deshpande <sameera.deshpande@arm.com>
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Greta Yorsh <greta.yorsh@arm.com>
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* config/arm/arm-protos.h (arm_expand_epilogue): New declaration.
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* config/arm/arm.c (arm_expand_epilogue): New function.
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* config/arm/arm.md (epilogue): Update condition and code.
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(sibcall_epilogue): Likewise.
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2012-06-18 Ian Bolton <ian.bolton@arm.com>
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Sameera Deshpande <sameera.deshpande@arm.com>
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Greta Yorsh <greta.yorsh@arm.com>
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@ -30,6 +30,7 @@ extern void arm_load_pic_register (unsigned long);
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extern int arm_volatile_func (void);
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extern const char *arm_output_epilogue (rtx);
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extern void arm_expand_prologue (void);
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extern void arm_expand_epilogue (bool);
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extern const char *arm_strip_name_encoding (const char *);
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extern void arm_asm_output_labelref (FILE *, const char *);
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extern void thumb2_asm_output_opcode (FILE *);
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@ -23473,6 +23473,241 @@ arm_expand_epilogue_apcs_frame (bool really_return)
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emit_jump_insn (simple_return_rtx);
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}
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/* Generate RTL to represent ARM epilogue. Really_return is true if the
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function is not a sibcall. */
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void
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arm_expand_epilogue (bool really_return)
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{
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unsigned long func_type;
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unsigned long saved_regs_mask;
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int num_regs = 0;
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int i;
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int amount;
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int floats_from_frame = 0;
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arm_stack_offsets *offsets;
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func_type = arm_current_func_type ();
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/* Naked functions don't have epilogue. Hence, generate return pattern, and
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let output_return_instruction take care of instruction emition if any. */
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if (IS_NAKED (func_type)
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|| (IS_VOLATILE (func_type) && TARGET_ABORT_NORETURN))
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{
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emit_jump_insn (simple_return_rtx);
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return;
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}
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/* If we are throwing an exception, then we really must be doing a
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return, so we can't tail-call. */
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gcc_assert (!crtl->calls_eh_return || really_return);
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if (TARGET_APCS_FRAME && frame_pointer_needed && TARGET_ARM)
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{
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arm_expand_epilogue_apcs_frame (really_return);
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return;
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}
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/* Get frame offsets for ARM. */
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offsets = arm_get_frame_offsets ();
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saved_regs_mask = offsets->saved_regs_mask;
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/* Find offset of floating point register from frame pointer.
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The initialization is done in this way to take care of frame pointer
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and static-chain register, if stored. */
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floats_from_frame = offsets->saved_args - offsets->frame;
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/* Compute how many registers saved and how far away the floats will be. */
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for (i = 0; i <= LAST_ARM_REGNUM; i++)
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if (saved_regs_mask & (1 << i))
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{
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num_regs++;
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floats_from_frame += 4;
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}
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if (frame_pointer_needed)
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{
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/* Restore stack pointer if necessary. */
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if (TARGET_ARM)
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{
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/* In ARM mode, frame pointer points to first saved register.
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Restore stack pointer to last saved register. */
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amount = offsets->frame - offsets->saved_regs;
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/* Force out any pending memory operations that reference stacked data
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before stack de-allocation occurs. */
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emit_insn (gen_blockage ());
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emit_insn (gen_addsi3 (stack_pointer_rtx,
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hard_frame_pointer_rtx,
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GEN_INT (amount)));
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/* Emit USE(stack_pointer_rtx) to ensure that stack adjustment is not
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deleted. */
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emit_insn (gen_prologue_use (stack_pointer_rtx));
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}
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else
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{
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/* In Thumb-2 mode, the frame pointer points to the last saved
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register. */
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amount = offsets->locals_base - offsets->saved_regs;
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if (amount)
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emit_insn (gen_addsi3 (hard_frame_pointer_rtx,
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hard_frame_pointer_rtx,
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GEN_INT (amount)));
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/* Force out any pending memory operations that reference stacked data
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before stack de-allocation occurs. */
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emit_insn (gen_blockage ());
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emit_insn (gen_movsi (stack_pointer_rtx, hard_frame_pointer_rtx));
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/* Emit USE(stack_pointer_rtx) to ensure that stack adjustment is not
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deleted. */
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emit_insn (gen_prologue_use (stack_pointer_rtx));
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}
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}
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else
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{
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/* Pop off outgoing args and local frame to adjust stack pointer to
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last saved register. */
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amount = offsets->outgoing_args - offsets->saved_regs;
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if (amount)
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{
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/* Force out any pending memory operations that reference stacked data
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before stack de-allocation occurs. */
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emit_insn (gen_blockage ());
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emit_insn (gen_addsi3 (stack_pointer_rtx,
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stack_pointer_rtx,
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GEN_INT (amount)));
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/* Emit USE(stack_pointer_rtx) to ensure that stack adjustment is
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not deleted. */
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emit_insn (gen_prologue_use (stack_pointer_rtx));
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}
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}
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if (TARGET_HARD_FLOAT && TARGET_VFP)
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{
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/* Generate VFP register multi-pop. */
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int end_reg = LAST_VFP_REGNUM + 1;
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/* Scan the registers in reverse order. We need to match
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any groupings made in the prologue and generate matching
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vldm operations. The need to match groups is because,
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unlike pop, vldm can only do consecutive regs. */
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for (i = LAST_VFP_REGNUM - 1; i >= FIRST_VFP_REGNUM; i -= 2)
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/* Look for a case where a reg does not need restoring. */
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if ((!df_regs_ever_live_p (i) || call_used_regs[i])
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&& (!df_regs_ever_live_p (i + 1)
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|| call_used_regs[i + 1]))
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{
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/* Restore the regs discovered so far (from reg+2 to
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end_reg). */
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if (end_reg > i + 2)
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arm_emit_vfp_multi_reg_pop (i + 2,
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(end_reg - (i + 2)) / 2,
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stack_pointer_rtx);
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end_reg = i;
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}
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/* Restore the remaining regs that we have discovered (or possibly
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even all of them, if the conditional in the for loop never
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fired). */
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if (end_reg > i + 2)
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arm_emit_vfp_multi_reg_pop (i + 2,
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(end_reg - (i + 2)) / 2,
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stack_pointer_rtx);
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}
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if (TARGET_IWMMXT)
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for (i = FIRST_IWMMXT_REGNUM; i <= LAST_IWMMXT_REGNUM; i++)
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if (df_regs_ever_live_p (i) && !call_used_regs[i])
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{
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rtx insn;
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rtx addr = gen_rtx_MEM (V2SImode,
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gen_rtx_POST_INC (SImode,
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stack_pointer_rtx));
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set_mem_alias_set (addr, get_frame_alias_set ());
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insn = emit_insn (gen_movsi (gen_rtx_REG (V2SImode, i), addr));
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REG_NOTES (insn) = alloc_reg_note (REG_CFA_RESTORE,
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gen_rtx_REG (V2SImode, i),
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NULL_RTX);
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}
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if (saved_regs_mask)
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{
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rtx insn;
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bool return_in_pc = false;
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if (ARM_FUNC_TYPE (func_type) != ARM_FT_INTERWORKED
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&& (TARGET_ARM || ARM_FUNC_TYPE (func_type) == ARM_FT_NORMAL)
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&& !IS_STACKALIGN (func_type)
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&& really_return
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&& crtl->args.pretend_args_size == 0
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&& saved_regs_mask & (1 << LR_REGNUM)
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&& !crtl->calls_eh_return)
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{
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saved_regs_mask &= ~(1 << LR_REGNUM);
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saved_regs_mask |= (1 << PC_REGNUM);
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return_in_pc = true;
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}
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if (num_regs == 1 && (!IS_INTERRUPT (func_type) || !return_in_pc))
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{
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for (i = 0; i <= LAST_ARM_REGNUM; i++)
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if (saved_regs_mask & (1 << i))
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{
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rtx addr = gen_rtx_MEM (SImode,
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gen_rtx_POST_INC (SImode,
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stack_pointer_rtx));
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set_mem_alias_set (addr, get_frame_alias_set ());
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if (i == PC_REGNUM)
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{
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insn = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
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XVECEXP (insn, 0, 0) = ret_rtx;
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XVECEXP (insn, 0, 1) = gen_rtx_SET (SImode,
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gen_rtx_REG (SImode, i),
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addr);
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RTX_FRAME_RELATED_P (XVECEXP (insn, 0, 1)) = 1;
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insn = emit_jump_insn (insn);
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}
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else
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{
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insn = emit_insn (gen_movsi (gen_rtx_REG (SImode, i),
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addr));
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REG_NOTES (insn) = alloc_reg_note (REG_CFA_RESTORE,
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gen_rtx_REG (SImode, i),
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NULL_RTX);
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}
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}
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}
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else
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{
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arm_emit_multi_reg_pop (saved_regs_mask);
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}
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if (return_in_pc == true)
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return;
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}
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if (crtl->args.pretend_args_size)
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emit_insn (gen_addsi3 (stack_pointer_rtx,
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stack_pointer_rtx,
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GEN_INT (crtl->args.pretend_args_size)));
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if (!really_return)
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return;
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if (crtl->calls_eh_return)
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emit_insn (gen_addsi3 (stack_pointer_rtx,
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stack_pointer_rtx,
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gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM)));
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if (IS_STACKALIGN (func_type))
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/* Restore the original stack pointer. Before prologue, the stack was
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realigned and the original stack pointer saved in r0. For details,
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see comment in arm_expand_prologue. */
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emit_insn (gen_movsi (stack_pointer_rtx, gen_rtx_REG (SImode, 0)));
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emit_jump_insn (simple_return_rtx);
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}
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/* Implementation of insn prologue_thumb1_interwork. This is the first
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"instruction" of a function called in ARM mode. Swap to thumb mode. */
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@ -10547,14 +10547,21 @@
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if (crtl->calls_eh_return)
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emit_insn (gen_prologue_use (gen_rtx_REG (Pmode, 2)));
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if (TARGET_THUMB1)
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thumb1_expand_epilogue ();
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else if (USE_RETURN_INSN (FALSE))
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{
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emit_jump_insn (gen_return ());
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DONE;
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}
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emit_jump_insn (gen_rtx_UNSPEC_VOLATILE (VOIDmode,
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gen_rtvec (1, ret_rtx), VUNSPEC_EPILOGUE));
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{
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thumb1_expand_epilogue ();
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emit_jump_insn (gen_rtx_UNSPEC_VOLATILE (VOIDmode,
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gen_rtvec (1, ret_rtx), VUNSPEC_EPILOGUE));
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}
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else if (HAVE_return)
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{
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/* HAVE_return is testing for USE_RETURN_INSN (FALSE). Hence,
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no need for explicit testing again. */
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emit_jump_insn (gen_return ());
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}
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else if (TARGET_32BIT)
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{
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arm_expand_epilogue (true);
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}
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DONE;
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"
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)
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@ -10571,22 +10578,14 @@
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;; to add an unspec of the link register to ensure that flow
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;; does not think that it is unused by the sibcall branch that
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;; will replace the standard function epilogue.
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(define_insn "sibcall_epilogue"
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[(parallel [(unspec:SI [(reg:SI LR_REGNUM)] UNSPEC_PROLOGUE_USE)
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(unspec_volatile [(return)] VUNSPEC_EPILOGUE)])]
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"TARGET_32BIT"
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"*
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if (use_return_insn (FALSE, next_nonnote_insn (insn)))
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return output_return_instruction (const_true_rtx, FALSE, FALSE);
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return arm_output_epilogue (next_nonnote_insn (insn));
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"
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;; Length is absolute worst case
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[(set_attr "length" "44")
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(set_attr "type" "block")
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;; We don't clobber the conditions, but the potential length of this
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;; operation is sufficient to make conditionalizing the sequence
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;; unlikely to be profitable.
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(set_attr "conds" "clob")]
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(define_expand "sibcall_epilogue"
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[(parallel [(unspec:SI [(reg:SI LR_REGNUM)] UNSPEC_PROLOGUE_USE)
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(unspec_volatile [(return)] VUNSPEC_EPILOGUE)])]
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"TARGET_32BIT"
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"
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arm_expand_epilogue (false);
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DONE;
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"
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)
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(define_insn "*epilogue_insns"
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