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x86: {,v}psadbw have commutative source operands

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Like noticed for gas as well (binutils-gdb commit c8cad9d389b7), the
"absolute difference" aspect of the insns makes their source operands
commutative.

gcc/

	* config/i386/mmx.md (mmx_psadbw): Convert to expander.
	(*mmx_psadbw): New. Mark as commutative.
	* config/i386/sse.md (<sse2_avx2>_psadbw): Convert to expander.
	(*<sse2_avx2>_psadbw): New. Mark as commutative.
This commit is contained in:
Jan Beulich 2022-06-03 10:21:21 +02:00
parent be2861fe8c
commit d4630b65d1
2 changed files with 26 additions and 8 deletions
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16
gcc/config/i386/mmx.md
View File

@ -4405,13 +4405,21 @@
(set_attr "type" "sseiadd")
(set_attr "mode" "TI")])
(define_insn "mmx_psadbw"
(define_expand "mmx_psadbw"
[(set (match_operand:V1DI 0 "register_operand")
(unspec:V1DI [(match_operand:V8QI 1 "register_mmxmem_operand")
(match_operand:V8QI 2 "register_mmxmem_operand")]
UNSPEC_PSADBW))]
"(TARGET_MMX || TARGET_MMX_WITH_SSE) && (TARGET_SSE || TARGET_3DNOW_A)"
"ix86_fixup_binary_operands_no_copy (PLUS, V8QImode, operands);")
(define_insn "*mmx_psadbw"
[(set (match_operand:V1DI 0 "register_operand" "=y,x,Yw")
(unspec:V1DI [(match_operand:V8QI 1 "register_operand" "0,0,Yw")
(unspec:V1DI [(match_operand:V8QI 1 "register_mmxmem_operand" "%0,0,Yw")
(match_operand:V8QI 2 "register_mmxmem_operand" "ym,x,Yw")]
UNSPEC_PSADBW))]
"(TARGET_MMX || TARGET_MMX_WITH_SSE)
&& (TARGET_SSE || TARGET_3DNOW_A)"
"(TARGET_MMX || TARGET_MMX_WITH_SSE) && (TARGET_SSE || TARGET_3DNOW_A)
&& ix86_binary_operator_ok (PLUS, V8QImode, operands)"
"@
psadbw\t{%2, %0|%0, %2}
psadbw\t{%2, %0|%0, %2}

18
gcc/config/i386/sse.md
View File

@ -19982,13 +19982,23 @@
;; The correct representation for this is absolutely enormous, and
;; surely not generally useful.
(define_insn "<sse2_avx2>_psadbw"
[(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand" "=x,YW")
(define_expand "<sse2_avx2>_psadbw"
[(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand")
(unspec:VI8_AVX2_AVX512BW
[(match_operand:<ssebytemode> 1 "register_operand" "0,YW")
(match_operand:<ssebytemode> 2 "vector_operand" "xBm,YWm")]
[(match_operand:<ssebytemode> 1 "vector_operand")
(match_operand:<ssebytemode> 2 "vector_operand")]
UNSPEC_PSADBW))]
"TARGET_SSE2"
"ix86_fixup_binary_operands_no_copy (PLUS, <ssebytemode>mode, operands);")
(define_insn "*<sse2_avx2>_psadbw"
[(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand" "=x,YW")
(unspec:VI8_AVX2_AVX512BW
[(match_operand:<ssebytemode> 1 "vector_operand" "%0,YW")
(match_operand:<ssebytemode> 2 "vector_operand" "xBm,YWm")]
UNSPEC_PSADBW))]
"TARGET_SSE2
&& ix86_binary_operator_ok (PLUS, <ssebytemode>mode, operands)"
"@
psadbw\t{%2, %0|%0, %2}
vpsadbw\t{%2, %1, %0|%0, %1, %2}"