i386.md (addsi3_cc): Add "binary_operator_ok" to the condition.
* i386.md (addsi3_cc): Add "binary_operator_ok" to the condition. (addsi3_carry): Likewise. (sbbsi3_cc): Add "binary_operator_ok" to the condition. (sbbsi3_carry): Likewise. (mulsi3): Rewrite to expander, ensure that only one operand is memory. (mulhi3): Likewise. (test?i_1): Ensure that only one operand is memory. (conditional move patterns): likewise. (shift and rotate patterns): Rewrite to expander, add "binary_operator_ok" to the condition. From-SVN: r30747
This commit is contained in:
Jan Hubicka
Jan Hubicka
parent
7c6b971dcc
commit
d525dfdf29
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@ -1,5 +1,16 @@
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Fri Nov 26 10:59:12 CET 1999 Jan Hubicka <hubicka@freesoft.cz>
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* i386.md (addsi3_cc): Add "binary_operator_ok" to the condition.
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(addsi3_carry): Likewise.
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(sbbsi3_cc): Add "binary_operator_ok" to the condition.
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(sbbsi3_carry): Likewise.
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(mulsi3): Rewrite to expander, ensure that only one operand is memory.
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(mulhi3): Likewise.
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(test?i_1): Ensure that only one operand is memory.
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(conditional move patterns): likewise.
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(shift and rotate patterns): Rewrite to expander, add
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"binary_operator_ok" to the condition.
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* i386.md (QImode patterns): Remove '*' before the 'r' constraints.
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* i386.h (procesor_costs): Add movzbl_load field.
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(HARD_REGNO_MODE_OK): Accept QImode on non PARTIAL_REGISTER_STALL in
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@ -3012,7 +3012,7 @@
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(match_operand:SI 2 "general_operand" "ri,rm")))
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(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
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(plus:SI (match_dup 1) (match_dup 2)))]
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""
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"ix86_binary_operator_ok (PLUS, SImode, operands)"
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"add{l}\\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")])
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@ -3022,7 +3022,7 @@
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(plus:SI (match_operand:SI 2 "general_operand" "ri,rm")
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(ltu:SI (reg:CC 17) (const_int 0)))))
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(clobber (reg:CC 17))]
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""
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"ix86_binary_operator_ok (PLUS, SImode, operands)"
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"adc{l}\\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "pent_pair" "pu")
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@ -3526,7 +3526,7 @@
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(match_operand:SI 2 "general_operand" "ri,rm")))
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(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
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(minus:SI (match_dup 1) (match_dup 2)))]
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""
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"ix86_binary_operator_ok (MINUS, SImode, operands)"
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"sub{l}\\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")])
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@ -3536,7 +3536,7 @@
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(plus:SI (match_operand:SI 2 "general_operand" "ri,rm")
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(ltu:SI (reg:CC 17) (const_int 0)))))
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(clobber (reg:CC 17))]
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""
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"ix86_binary_operator_ok (MINUS, SImode, operands)"
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"sbb{l}\\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "pent_pair" "pu")
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@ -3690,12 +3690,20 @@
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;; Multiply instructions
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(define_insn "mulsi3"
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(define_expand "mulsi3"
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[(parallel [(set (match_operand:SI 0 "register_operand" "")
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(mult:SI (match_operand:SI 1 "register_operand" "")
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(match_operand:SI 2 "general_operand" "")))
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(clobber (reg:CC 17))])]
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""
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"")
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(define_insn "*mulsi3_1"
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[(set (match_operand:SI 0 "register_operand" "=r,r,r")
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(mult:SI (match_operand:SI 1 "nonimmediate_operand" "%rm,0,0")
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(match_operand:SI 2 "general_operand" "K,i,mr")))
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(clobber (reg:CC 17))]
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""
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"GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM"
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; For the {r,0,i} alternative (i.e., register <- register * immediate),
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; there are two ways of writing the exact same machine instruction
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; in assembly language. One, for example, is:
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@ -3715,12 +3723,20 @@
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[(set_attr "type" "imul")
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(set_attr "length" "2,3,2")])
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(define_insn "mulhi3"
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(define_expand "mulhi3"
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[(parallel [(set (match_operand:HI 0 "register_operand" "")
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(mult:HI (match_operand:HI 1 "register_operand" "")
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(match_operand:HI 2 "general_operand" "")))
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(clobber (reg:CC 17))])]
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""
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"")
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(define_insn "*mulhi3_1"
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[(set (match_operand:HI 0 "register_operand" "=r,r")
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(mult:HI (match_operand:HI 1 "nonimmediate_operand" "%rm,0")
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(match_operand:HI 2 "general_operand" "K,g")))
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(clobber (reg:CC 17))]
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""
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"GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM"
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; %%% There was a note about "Assembler has weird restrictions",
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; concerning alternative 1 when op1 == op0. True?
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"@
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@ -4057,7 +4073,7 @@
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(compare:CCNO (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
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(match_operand:SI 1 "general_operand" "in,in,rin"))
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(const_int 0)))]
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""
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"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
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"test{l}\\t{%1, %0|%0, %1}"
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[(set_attr "type" "icmp")
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(set_attr "pent_pair" "uv,np,uv")])
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@ -4067,7 +4083,7 @@
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(compare:CCNO (and:HI (match_operand:HI 0 "nonimmediate_operand" "%*a,r,rm")
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(match_operand:HI 1 "general_operand" "n,n,rn"))
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(const_int 0)))]
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""
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"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
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"test{w}\\t{%1, %0|%0, %1}"
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[(set_attr "type" "icmp")
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(set_attr "pent_pair" "uv,np,uv")])
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@ -4077,7 +4093,7 @@
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(compare:CCNO (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm")
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(match_operand:QI 1 "general_operand" "n,n,qn"))
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(const_int 0)))]
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""
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"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
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"test{b}\\t{%1, %0|%0, %1}"
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[(set_attr "type" "icmp")
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(set_attr "pent_pair" "uv,np,uv")])
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@ -5471,12 +5487,20 @@
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DONE;
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}")
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(define_insn "ashlsi3"
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(define_expand "ashlsi3"
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[(set (match_operand:SI 0 "nonimmediate_operand" "")
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(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "")
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(match_operand:QI 2 "nonmemory_operand" "")))
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(clobber (reg:CC 17))]
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""
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"ix86_expand_binary_operator (ASHIFT, SImode, operands); DONE;")
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(define_insn "*ashlsi3_1"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
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(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0,r")
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(match_operand:QI 2 "nonmemory_operand" "cI,M")))
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(clobber (reg:CC 17))]
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""
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"ix86_binary_operator_ok (ASHIFT, SImode, operands)"
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"*
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{
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switch (get_attr_type (insn))
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@ -5535,7 +5559,7 @@
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(const_int 0)))
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(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
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(ashift:SI (match_dup 1) (match_dup 2)))]
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""
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"ix86_binary_operator_ok (ASHIFT, SImode, operands)"
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"*
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{
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switch (get_attr_type (insn))
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@ -5561,12 +5585,20 @@
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]
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(const_string "ishift")))])
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(define_insn "ashlhi3"
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(define_expand "ashlhi3"
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[(set (match_operand:HI 0 "nonimmediate_operand" "")
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(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "")
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(match_operand:QI 2 "nonmemory_operand" "")))
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(clobber (reg:CC 17))]
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""
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"ix86_expand_binary_operator (ASHIFT, HImode, operands); DONE;")
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(define_insn "*ashlhi3_1"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
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(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "nonmemory_operand" "cI")))
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(clobber (reg:CC 17))]
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""
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"ix86_binary_operator_ok (ASHIFT, HImode, operands)"
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"*
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{
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switch (get_attr_type (insn))
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@ -5611,7 +5643,7 @@
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(const_int 0)))
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(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
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(ashift:HI (match_dup 1) (match_dup 2)))]
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""
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"ix86_binary_operator_ok (ASHIFT, HImode, operands)"
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"*
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{
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switch (get_attr_type (insn))
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@ -5637,13 +5669,21 @@
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]
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(const_string "ishift")))])
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(define_expand "ashlqi3"
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[(set (match_operand:QI 0 "nonimmediate_operand" "")
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(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "")
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(match_operand:QI 2 "nonmemory_operand" "")))
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(clobber (reg:CC 17))]
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""
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"ix86_expand_binary_operator (ASHIFT, QImode, operands); DONE;")
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;; %%% Potential partial reg stall on alternative 2. What to do?
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(define_insn "ashlqi3"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,*r")
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(define_insn "*ashlqi3_1"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r")
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(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "cI,cI")))
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(clobber (reg:CC 17))]
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""
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"ix86_binary_operator_ok (ASHIFT, QImode, operands)"
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"*
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{
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switch (get_attr_type (insn))
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@ -5690,7 +5730,7 @@
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(const_int 0)))
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(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
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(ashift:QI (match_dup 1) (match_dup 2)))]
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""
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"ix86_binary_operator_ok (ASHIFT, QImode, operands)"
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"*
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{
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switch (get_attr_type (insn))
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@ -5821,19 +5861,28 @@
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(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "*a,0")
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(match_operand:SI 2 "const_int_operand" "i,i")))
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(clobber (reg:CC 17))]
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"INTVAL (operands[2]) == 31 && (TARGET_USE_CLTD || optimize_size)"
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"INTVAL (operands[2]) == 31 && (TARGET_USE_CLTD || optimize_size)
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&& ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
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"@
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{cltd|cdq}
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sar{l}\\t{%2, %0|%0, %2}"
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[(set_attr "type" "imovx,ishift")
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(set_attr "length" "1,*")])
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(define_insn "ashrsi3"
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(define_expand "ashrsi3"
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[(set (match_operand:SI 0 "nonimmediate_operand" "")
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(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "")
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(match_operand:QI 2 "nonmemory_operand" "")))
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(clobber (reg:CC 17))]
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""
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"ix86_expand_binary_operator (ASHIFTRT, SImode, operands); DONE;")
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(define_insn "*ashrsi3_1"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
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(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "I,c")))
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(clobber (reg:CC 17))]
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""
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"ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
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"@
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sar{l}\\t{%2, %0|%0, %2}
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sar{l}\\t{%b2, %0|%0, %b2}"
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@ -5847,18 +5896,26 @@
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(const_int 0)))
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(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
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(ashiftrt:SI (match_dup 1) (match_dup 2)))]
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""
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"ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
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"@
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sar{l}\\t{%2, %0|%0, %2}
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sar{l}\\t{%b2, %0|%0, %b2}"
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[(set_attr "type" "ishift")])
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(define_insn "ashrhi3"
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(define_expand "ashrhi3"
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[(set (match_operand:HI 0 "nonimmediate_operand" "")
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(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "")
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(match_operand:QI 2 "nonmemory_operand" "")))
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(clobber (reg:CC 17))]
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""
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"ix86_expand_binary_operator (ASHIFTRT, HImode, operands); DONE;")
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(define_insn "*ashrhi3_1"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
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(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "I,c")))
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(clobber (reg:CC 17))]
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""
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"ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
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"@
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sar{w}\\t{%2, %0|%0, %2}
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sar{w}\\t{%b2, %0|%0, %b2}"
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@ -5872,18 +5929,26 @@
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(const_int 0)))
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(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
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(ashiftrt:HI (match_dup 1) (match_dup 2)))]
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""
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"ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
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"@
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sar{w}\\t{%2, %0|%0, %2}
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sar{w}\\t{%b2, %0|%0, %b2}"
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[(set_attr "type" "ishift")])
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(define_insn "ashrqi3"
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(define_expand "ashrqi3"
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[(set (match_operand:QI 0 "nonimmediate_operand" "")
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(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "")
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(match_operand:QI 2 "nonmemory_operand" "")))
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(clobber (reg:CC 17))]
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""
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"ix86_expand_binary_operator (ASHIFTRT, QImode, operands); DONE;")
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(define_insn "*ashrqi3_1"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,qm")
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(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "I,c")))
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(clobber (reg:CC 17))]
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""
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"ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
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"@
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sar{b}\\t{%2, %0|%0, %2}
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sar{b}\\t{%b2, %0|%0, %b2}"
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@ -5897,7 +5962,7 @@
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(const_int 0)))
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(set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
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(ashiftrt:QI (match_dup 1) (match_dup 2)))]
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""
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"ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
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"@
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sar{b}\\t{%2, %0|%0, %2}
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sar{b}\\t{%b2, %0|%0, %b2}"
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@ -5960,12 +6025,20 @@
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[(const_int 0)]
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"ix86_split_lshrdi (operands, NULL_RTX); DONE;")
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(define_insn "lshrsi3"
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(define_expand "lshrsi3"
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[(set (match_operand:SI 0 "nonimmediate_operand" "")
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(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "")
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(match_operand:QI 2 "nonmemory_operand" "")))
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(clobber (reg:CC 17))]
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""
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"ix86_expand_binary_operator (LSHIFTRT, SImode, operands); DONE;")
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(define_insn "*lshrsi3_1"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
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(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "I,c")))
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(clobber (reg:CC 17))]
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""
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"ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
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"@
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shr{l}\\t{%2, %0|%0, %2}
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shr{l}\\t{%b2, %0|%0, %b2}"
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@ -5979,18 +6052,26 @@
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(const_int 0)))
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(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
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(lshiftrt:SI (match_dup 1) (match_dup 2)))]
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""
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"ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
|
||||
"@
|
||||
shr{l}\\t{%2, %0|%0, %2}
|
||||
shr{l}\\t{%b2, %0|%0, %b2}"
|
||||
[(set_attr "type" "ishift")])
|
||||
|
||||
(define_insn "lshrhi3"
|
||||
(define_expand "lshrhi3"
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "")
|
||||
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "")
|
||||
(match_operand:QI 2 "nonmemory_operand" "")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_expand_binary_operator (LSHIFTRT, HImode, operands); DONE;")
|
||||
|
||||
(define_insn "*lshrhi3_1"
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
|
||||
(match_operand:QI 2 "nonmemory_operand" "I,c")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
|
||||
"@
|
||||
shr{w}\\t{%2, %0|%0, %2}
|
||||
shr{w}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -6004,18 +6085,26 @@
|
|||
(const_int 0)))
|
||||
(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(lshiftrt:HI (match_dup 1) (match_dup 2)))]
|
||||
""
|
||||
"ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
|
||||
"@
|
||||
shr{w}\\t{%2, %0|%0, %2}
|
||||
shr{w}\\t{%b2, %0|%0, %b2}"
|
||||
[(set_attr "type" "ishift")])
|
||||
|
||||
(define_insn "lshrqi3"
|
||||
(define_expand "lshrqi3"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "")
|
||||
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "")
|
||||
(match_operand:QI 2 "nonmemory_operand" "")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_expand_binary_operator (LSHIFTRT, QImode, operands); DONE;")
|
||||
|
||||
(define_insn "*lshrqi3_1"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,qm")
|
||||
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
|
||||
(match_operand:QI 2 "nonmemory_operand" "I,c")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
|
||||
"@
|
||||
shr{b}\\t{%2, %0|%0, %2}
|
||||
shr{b}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -6029,7 +6118,7 @@
|
|||
(const_int 0)))
|
||||
(set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(lshiftrt:QI (match_dup 1) (match_dup 2)))]
|
||||
""
|
||||
"ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
|
||||
"@
|
||||
shr{b}\\t{%2, %0|%0, %2}
|
||||
shr{b}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -6037,12 +6126,20 @@
|
|||
|
||||
;; Rotate instructions
|
||||
|
||||
(define_insn "rotlsi3"
|
||||
(define_expand "rotlsi3"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "")
|
||||
(rotate:SI (match_operand:SI 1 "nonimmediate_operand" "")
|
||||
(match_operand:QI 2 "nonmemory_operand" "")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_expand_binary_operator (ROTATE, SImode, operands); DONE;")
|
||||
|
||||
(define_insn "*rotlsi3_1"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotate:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
|
||||
(match_operand:QI 2 "nonmemory_operand" "I,c")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATE, SImode, operands)"
|
||||
"@
|
||||
rol{l}\\t{%2, %0|%0, %2}
|
||||
rol{l}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -6056,18 +6153,26 @@
|
|||
(const_int 0)))
|
||||
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotate:SI (match_dup 1) (match_dup 2)))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATE, SImode, operands)"
|
||||
"@
|
||||
rol{l}\\t{%2, %0|%0, %2}
|
||||
rol{l}\\t{%b2, %0|%0, %b2}"
|
||||
[(set_attr "type" "ishift")])
|
||||
|
||||
(define_insn "rotlhi3"
|
||||
(define_expand "rotlhi3"
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "")
|
||||
(rotate:HI (match_operand:HI 1 "nonimmediate_operand" "")
|
||||
(match_operand:QI 2 "nonmemory_operand" "")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_expand_binary_operator (ROTATE, HImode, operands); DONE;")
|
||||
|
||||
(define_insn "*rotlhi3_1"
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotate:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
|
||||
(match_operand:QI 2 "nonmemory_operand" "I,c")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATE, HImode, operands)"
|
||||
"@
|
||||
rol{w}\\t{%2, %0|%0, %2}
|
||||
rol{w}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -6081,18 +6186,26 @@
|
|||
(const_int 0)))
|
||||
(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotate:HI (match_dup 1) (match_dup 2)))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATE, HImode, operands)"
|
||||
"@
|
||||
rol{w}\\t{%2, %0|%0, %2}
|
||||
rol{w}\\t{%b2, %0|%0, %b2}"
|
||||
[(set_attr "type" "ishift")])
|
||||
|
||||
(define_insn "rotlqi3"
|
||||
(define_expand "rotlqi3"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "")
|
||||
(rotate:QI (match_operand:QI 1 "nonimmediate_operand" "")
|
||||
(match_operand:QI 2 "nonmemory_operand" "")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_expand_binary_operator (ROTATE, QImode, operands); DONE;")
|
||||
|
||||
(define_insn "*rotlqi3_1"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,qm")
|
||||
(rotate:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
|
||||
(match_operand:QI 2 "nonmemory_operand" "I,c")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATE, QImode, operands)"
|
||||
"@
|
||||
rol{b}\\t{%2, %0|%0, %2}
|
||||
rol{b}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -6106,18 +6219,26 @@
|
|||
(const_int 0)))
|
||||
(set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotate:QI (match_dup 1) (match_dup 2)))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATE, QImode, operands)"
|
||||
"@
|
||||
rol{b}\\t{%2, %0|%0, %2}
|
||||
rol{b}\\t{%b2, %0|%0, %b2}"
|
||||
[(set_attr "type" "ishift")])
|
||||
|
||||
(define_insn "rotrsi3"
|
||||
(define_expand "rotrsi3"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "")
|
||||
(rotatert:SI (match_operand:SI 1 "nonimmediate_operand" "")
|
||||
(match_operand:QI 2 "nonmemory_operand" "")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_expand_binary_operator (ROTATERT, SImode, operands); DONE;")
|
||||
|
||||
(define_insn "*rotrsi3_1"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotatert:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
|
||||
(match_operand:QI 2 "nonmemory_operand" "I,c")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATERT, SImode, operands)"
|
||||
"@
|
||||
ror{l}\\t{%2, %0|%0, %2}
|
||||
ror{l}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -6131,18 +6252,26 @@
|
|||
(const_int 0)))
|
||||
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotatert:SI (match_dup 1) (match_dup 2)))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATERT, SImode, operands)"
|
||||
"@
|
||||
ror{l}\\t{%2, %0|%0, %2}
|
||||
ror{l}\\t{%b2, %0|%0, %b2}"
|
||||
[(set_attr "type" "ishift")])
|
||||
|
||||
(define_insn "rotrhi3"
|
||||
(define_expand "rotrhi3"
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "")
|
||||
(rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "")
|
||||
(match_operand:QI 2 "nonmemory_operand" "")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_expand_binary_operator (ROTATERT, HImode, operands); DONE;")
|
||||
|
||||
(define_insn "*rotrhi3"
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
|
||||
(match_operand:QI 2 "nonmemory_operand" "I,c")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATERT, HImode, operands)"
|
||||
"@
|
||||
ror{w}\\t{%2, %0|%0, %2}
|
||||
ror{w}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -6156,18 +6285,26 @@
|
|||
(const_int 0)))
|
||||
(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotatert:HI (match_dup 1) (match_dup 2)))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATERT, HImode, operands)"
|
||||
"@
|
||||
ror{w}\\t{%2, %0|%0, %2}
|
||||
ror{w}\\t{%b2, %0|%0, %b2}"
|
||||
[(set_attr "type" "ishift")])
|
||||
|
||||
(define_insn "rotrqi3"
|
||||
(define_expand "rotrqi3"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "")
|
||||
(rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "")
|
||||
(match_operand:QI 2 "nonmemory_operand" "")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_expand_binary_operator (ROTATERT, QImode, operands); DONE;")
|
||||
|
||||
(define_insn "*rotrqi3_1"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,qm")
|
||||
(rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
|
||||
(match_operand:QI 2 "nonmemory_operand" "I,c")))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATERT, QImode, operands)"
|
||||
"@
|
||||
ror{b}\\t{%2, %0|%0, %2}
|
||||
ror{b}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -6181,7 +6318,7 @@
|
|||
(const_int 0)))
|
||||
(set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
|
||||
(rotatert:QI (match_dup 1) (match_dup 2)))]
|
||||
""
|
||||
"ix86_binary_operator_ok (ROTATERT, QImode, operands)"
|
||||
"@
|
||||
ror{b}\\t{%2, %0|%0, %2}
|
||||
ror{b}\\t{%b2, %0|%0, %b2}"
|
||||
|
|
@ -7964,7 +8101,8 @@
|
|||
[(reg 17) (const_int 0)])
|
||||
(match_operand:SI 2 "nonimmediate_operand" "rm,0")
|
||||
(match_operand:SI 3 "nonimmediate_operand" "0,rm")))]
|
||||
"TARGET_CMOVE"
|
||||
"TARGET_CMOVE
|
||||
&& (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
|
||||
"@
|
||||
cmov%C1\\t{%2, %0|%0, %2}
|
||||
cmov%c1\\t{%3, %0|%0, %3}"
|
||||
|
|
@ -7976,7 +8114,8 @@
|
|||
[(reg:CC 17) (const_int 0)])
|
||||
(match_operand:SI 2 "nonimmediate_operand" "rm,0")
|
||||
(match_operand:SI 3 "nonimmediate_operand" "0,rm")))]
|
||||
"TARGET_CMOVE"
|
||||
"TARGET_CMOVE
|
||||
&& (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
|
||||
"@
|
||||
cmov%C1\\t{%2, %0|%0, %2}
|
||||
cmov%c1\\t{%3, %0|%0, %3}"
|
||||
|
|
@ -7996,7 +8135,8 @@
|
|||
[(reg 17) (const_int 0)])
|
||||
(match_operand:HI 2 "nonimmediate_operand" "rm,0")
|
||||
(match_operand:HI 3 "nonimmediate_operand" "0,rm")))]
|
||||
"TARGET_CMOVE"
|
||||
"TARGET_CMOVE
|
||||
&& (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
|
||||
"@
|
||||
cmov%C1\\t{%2, %0|%0, %2}
|
||||
cmov%c1\\t{%3, %0|%0, %3}"
|
||||
|
|
@ -8008,7 +8148,8 @@
|
|||
[(reg:CC 17) (const_int 0)])
|
||||
(match_operand:HI 2 "nonimmediate_operand" "rm,0")
|
||||
(match_operand:HI 3 "nonimmediate_operand" "0,rm")))]
|
||||
"TARGET_CMOVE"
|
||||
"TARGET_CMOVE
|
||||
&& (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
|
||||
"@
|
||||
cmov%C1\\t{%2, %0|%0, %2}
|
||||
cmov%c1\\t{%3, %0|%0, %3}"
|
||||
|
|
|
|||
Loading…
Reference in New Issue