Fix amdgcn issue with '0' constraints

2020-01-06  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
	'0' matching inputs.
	(subv64di3_exec): Likewise.

From-SVN: r279906
This commit is contained in:
Andrew Stubbs 2020-01-06 17:10:40 +00:00 committed by Andrew Stubbs
parent 2b4f0b8951
commit d54fc77076
2 changed files with 19 additions and 13 deletions

View File

@ -1,3 +1,9 @@
2020-01-06 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
'0' matching inputs.
(subv64di3_exec): Likewise.
2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
* config/mips/mips.c (vr4130_align_insns): Fix typo.

View File

@ -1292,10 +1292,10 @@
(set_attr "length" "8")])
(define_insn_and_split "subv64di3"
[(set (match_operand:V64DI 0 "register_operand" "= &v, &v")
(minus:V64DI
(match_operand:V64DI 1 "gcn_alu_operand" "vSvB0, v0")
(match_operand:V64DI 2 "gcn_alu_operand" " v0,vSvB0")))
[(set (match_operand:V64DI 0 "register_operand" "= &v, &v, &v, &v")
(minus:V64DI
(match_operand:V64DI 1 "gcn_alu_operand" "vSvB,vSvB0, v, v0")
(match_operand:V64DI 2 "gcn_alu_operand" " v0, v,vSvB0,vSvB")))
(clobber (reg:DI VCC_REG))]
""
"#"
@ -1318,17 +1318,17 @@
DONE;
}
[(set_attr "type" "vmult")
(set_attr "length" "8,8")])
(set_attr "length" "8")])
(define_insn_and_split "subv64di3_exec"
[(set (match_operand:V64DI 0 "register_operand" "= &v, &v")
(vec_merge:V64DI
(minus:V64DI
(match_operand:V64DI 1 "gcn_alu_operand" "vSvB0, v0")
(match_operand:V64DI 2 "gcn_alu_operand" " v0,vSvB0"))
[(set (match_operand:V64DI 0 "register_operand" "= &v, &v, &v, &v")
(vec_merge:V64DI
(minus:V64DI
(match_operand:V64DI 1 "gcn_alu_operand" "vSvB,vSvB0, v, v0")
(match_operand:V64DI 2 "gcn_alu_operand" " v0, v,vSvB0,vSvB"))
(match_operand:V64DI 3 "gcn_register_or_unspec_operand"
" U0, U0")
(match_operand:DI 4 "gcn_exec_reg_operand" " e, e")))
" U0, U0, U0, U0")
(match_operand:DI 4 "gcn_exec_reg_operand" " e, e, e, e")))
(clobber (reg:DI VCC_REG))]
"register_operand (operands[1], VOIDmode)
|| register_operand (operands[2], VOIDmode)"
@ -1357,7 +1357,7 @@
DONE;
}
[(set_attr "type" "vmult")
(set_attr "length" "8,8")])
(set_attr "length" "8")])
(define_insn_and_split "addv64di3_dup"
[(set (match_operand:V64DI 0 "register_operand" "= &v")