From d6b6ba29213242c1e0ce9cc9a63a4632e1f01ca2 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 2 Aug 2001 10:27:03 +0000 Subject: [PATCH] mips.md (movdicc): Make conditional on TARGET_64BIT. * mips.md (movdicc): Make conditional on TARGET_64BIT. Likewise for the unnamed instructions it expands to. From-SVN: r44568 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/mips.md | 8 ++++---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 21d54fad972..27de1f8509f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2001-08-02 Richard Sandiford + + * mips.md (movdicc): Make conditional on TARGET_64BIT. Likewise + for the unnamed instructions it expands to. + 2001-08-02 Richard Henderson * regclass.c (call_really_used_regs): Conditionally define. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 58fa9634bef..092e396c87c 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -10180,7 +10180,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\;j\\t%2" (const_int 0)]) (match_operand:DI 2 "se_reg_or_0_operand" "dJ,0") (match_operand:DI 3 "se_reg_or_0_operand" "0,dJ")))] - "ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE" + "(ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE) && TARGET_64BIT" "@ mov%B4\\t%0,%z2,%1 mov%b4\\t%0,%z3,%1" @@ -10195,7 +10195,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\;j\\t%2" (const_int 0)]) (match_operand:DI 2 "se_reg_or_0_operand" "dJ,0") (match_operand:DI 3 "se_reg_or_0_operand" "0,dJ")))] - "ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE" + "(ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE) && TARGET_64BIT" "@ mov%B4\\t%0,%z2,%1 mov%b4\\t%0,%z3,%1" @@ -10211,7 +10211,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\;j\\t%2" (const_int 0)]) (match_operand:DI 1 "se_reg_or_0_operand" "dJ,0") (match_operand:DI 2 "se_reg_or_0_operand" "0,dJ")))] - "ISA_HAS_CONDMOVE && TARGET_HARD_FLOAT" + "ISA_HAS_CONDMOVE && TARGET_HARD_FLOAT && TARGET_64BIT" "@ mov%T3\\t%0,%z1,%4 mov%t3\\t%0,%z2,%4" @@ -10331,7 +10331,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\;j\\t%2" (if_then_else:DI (match_dup 5) (match_operand:DI 2 "se_reg_or_0_operand" "") (match_operand:DI 3 "se_reg_or_0_operand" "")))] - "ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE" + "(ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE) && TARGET_64BIT" " { gen_conditional_move (operands);