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Check 256bit AVX register in move expanders. 

gcc/

2010-11-05  H.J. Lu  <hongjiu.lu@intel.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_expand_move): Set use_avx256_p if
	256bit AVX register is used.
	(ix86_expand_vector_move_misalign): Likewise.
	(ix86_expand_vector_move): Replace use_avx256_p with
	VALID_AVX256_REG_MODE.

gcc/testsuite/

2010-11-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gcc.target/i386/avx-vzeroupper-19.c: New.

Co-Authored-By: Uros Bizjak <ubizjak@gmail.com>

From-SVN: r166358
This commit is contained in:
H.J. Lu 2010-11-05 12:53:39 +00:00 committed by H.J. Lu
parent 8b7e852901
commit d73ee4e74e
4 changed files with 37 additions and 1 deletions
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9
gcc/ChangeLog
View File

@ -1,3 +1,12 @@
2010-11-05 H.J. Lu <hongjiu.lu@intel.com>
Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_expand_move): Set use_avx256_p if
256bit AVX register is used.
(ix86_expand_vector_move_misalign): Likewise.
(ix86_expand_vector_move): Replace use_avx256_p with
VALID_AVX256_REG_MODE.
2010-11-05 Joern Rennecke <amylaar@spamcop.net>
PR target/44750

8
gcc/config/i386/i386.c
View File

@ -15000,6 +15000,9 @@ ix86_expand_move (enum machine_mode mode, rtx operands[])
rtx op0, op1;
enum tls_model model;
if (VALID_AVX256_REG_MODE (mode))
cfun->machine->use_avx256_p = true;
op0 = operands[0];
op1 = operands[1];
@ -15144,7 +15147,7 @@ ix86_expand_vector_move (enum machine_mode mode, rtx operands[])
rtx op0 = operands[0], op1 = operands[1];
unsigned int align = GET_MODE_ALIGNMENT (mode);
if (use_avx256_p (mode, NULL_TREE))
if (VALID_AVX256_REG_MODE (mode))
cfun->machine->use_avx256_p = true;
/* Force constants other than zero into memory. We do not know how
@ -15253,6 +15256,9 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
{
rtx op0, op1, m;
if (VALID_AVX256_REG_MODE (mode))
cfun->machine->use_avx256_p = true;
op0 = operands[0];
op1 = operands[1];

4
gcc/testsuite/ChangeLog
View File

@ -1,3 +1,7 @@
2010-11-05 H.J. Lu <hongjiu.lu@intel.com>
* gcc.target/i386/avx-vzeroupper-19.c: New.
2010-11-05 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/46099

17
gcc/testsuite/gcc.target/i386/avx-vzeroupper-19.c Normal file
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@ -0,0 +1,17 @@
/* { dg-do compile } */
/* { dg-options "-O3 -mavx -mtune=generic -dp" } */
void feat_s3_cep_dcep (int cepsize_used, float **mfc, float **feat)
{
float *f;
float *w, *_w;
int i;
__builtin_memcpy (feat[0], mfc[0], cepsize_used * sizeof(float));
f = feat[0] + cepsize_used;
w = mfc[2];
_w = mfc[-2];
for (i = 0; i < cepsize_used; i++)
f[i] = w[i] - _w[i];
}
/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */