re PR target/49487 ([avr] ICE in bytewise rotate)
PR target/49487 * config/avr/avr.md (rotl<mode>3): Generate SCRATCH instead of REG. (*rotw<mode>): Use const_int_operand for operand2. Use match_scatch for operand3. (*rotb<mode>): Ditto * config/avr/avr.c (avr_rotate_bytes): Treat SCRATCH. From-SVN: r176276
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@ -1,3 +1,13 @@
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2011-07-14 Georg-Johann Lay <avr@gjlay.de>
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PR target/49487
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* config/avr/avr.md (rotl<mode>3): Generate SCRATCH instead
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of REG.
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(*rotw<mode>): Use const_int_operand for operand2.
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Use match_scatch for operand3.
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(*rotb<mode>): Ditto
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* config/avr/avr.c (avr_rotate_bytes): Treat SCRATCH.
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2011-07-14 Richard Guenther <rguenther@suse.de>
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PR tree-optimization/49651
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@ -4438,7 +4438,9 @@ avr_rotate_bytes (rtx operands[])
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if (mode == DImode)
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move_mode = QImode;
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/* Make scratch smaller if needed. */
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if (GET_MODE (scratch) == HImode && move_mode == QImode)
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if (SCRATCH != GET_CODE (scratch)
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&& HImode == GET_MODE (scratch)
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&& QImode == move_mode)
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scratch = simplify_gen_subreg (move_mode, scratch, HImode, 0);
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move_size = GET_MODE_SIZE (move_mode);
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@ -4534,6 +4536,8 @@ avr_rotate_bytes (rtx operands[])
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When this move occurs, it will break chain deadlock.
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The scratch register is substituted for real move. */
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gcc_assert (SCRATCH != GET_CODE (scratch));
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move[size].src = move[blocked].dst;
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move[size].dst = scratch;
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/* Scratch move is never blocked. */
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@ -1597,18 +1597,18 @@
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(match_operand:VOID 2 "const_int_operand" "")))
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(clobber (match_dup 3))])]
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""
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"
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{
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if (CONST_INT_P (operands[2]) && 0 == (INTVAL (operands[2]) % 8))
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{
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if (AVR_HAVE_MOVW && 0 == INTVAL (operands[2]) % 16)
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operands[3] = gen_reg_rtx (<rotsmode>mode);
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else
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operands[3] = gen_reg_rtx (QImode);
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}
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else
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FAIL;
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}")
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if (CONST_INT_P (operands[2])
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&& 0 == INTVAL (operands[2]) % 8)
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{
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if (AVR_HAVE_MOVW && 0 == INTVAL (operands[2]) % 16)
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operands[3] = gen_rtx_SCRATCH (<rotsmode>mode);
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else
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operands[3] = gen_rtx_SCRATCH (QImode);
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}
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else
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FAIL;
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})
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;; Overlapping non-HImode registers often (but not always) need a scratch.
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@ -1620,34 +1620,38 @@
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; Split word aligned rotates using scratch that is mode dependent.
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(define_insn_and_split "*rotw<mode>"
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[(set (match_operand:HIDI 0 "register_operand" "=r,r,#&r")
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(rotate:HIDI (match_operand:HIDI 1 "register_operand" "0,r,r")
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(match_operand 2 "immediate_operand" "n,n,n")))
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(clobber (match_operand:<rotsmode> 3 "register_operand" "=<rotx>" ))]
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"(CONST_INT_P (operands[2]) &&
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(0 == (INTVAL (operands[2]) % 16) && AVR_HAVE_MOVW))"
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(rotate:HIDI (match_operand:HIDI 1 "register_operand" "0,r,r")
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(match_operand 2 "const_int_operand" "n,n,n")))
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(clobber (match_scratch:<rotsmode> 3 "=<rotx>"))]
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"AVR_HAVE_MOVW
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&& CONST_INT_P (operands[2])
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&& 0 == INTVAL (operands[2]) % 16"
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"#"
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"&& (reload_completed || <MODE>mode == DImode)"
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[(const_int 0)]
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"avr_rotate_bytes (operands);
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DONE;"
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)
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{
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avr_rotate_bytes (operands);
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DONE;
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})
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; Split byte aligned rotates using scratch that is always QI mode.
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(define_insn_and_split "*rotb<mode>"
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[(set (match_operand:HIDI 0 "register_operand" "=r,r,#&r")
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(rotate:HIDI (match_operand:HIDI 1 "register_operand" "0,r,r")
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(match_operand 2 "immediate_operand" "n,n,n")))
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(clobber (match_operand:QI 3 "register_operand" "=<rotx>" ))]
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"(CONST_INT_P (operands[2]) &&
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(8 == (INTVAL (operands[2]) % 16)
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|| (!AVR_HAVE_MOVW && 0 == (INTVAL (operands[2]) % 16))))"
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(rotate:HIDI (match_operand:HIDI 1 "register_operand" "0,r,r")
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(match_operand 2 "const_int_operand" "n,n,n")))
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(clobber (match_scratch:QI 3 "=<rotx>"))]
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"CONST_INT_P (operands[2])
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&& (8 == INTVAL (operands[2]) % 16
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|| (!AVR_HAVE_MOVW
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&& 0 == INTVAL (operands[2]) % 16))"
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"#"
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"&& (reload_completed || <MODE>mode == DImode)"
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[(const_int 0)]
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"avr_rotate_bytes (operands);
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DONE;"
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)
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{
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avr_rotate_bytes (operands);
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DONE;
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})
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;;<< << << << << << << << << << << << << << << << << << << << << << << << << <<
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