config.gcc (supported_defaults): Add madd4.
gcc/ 2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> Yunqiang Su <yunqiang.su@imgtec.com> * config.gcc (supported_defaults): Add madd4. (with_madd4): Add validation. (all_defaults): Add madd4. * config/mips/mips.opt (mmadd4): New option. * gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for mmadd4. (TARGET_CPU_CPP_BUILTINS): Add builtin_define for __mips_no_madd4. (ISA_HAS_UNFUSED_MADD4): Gate with mips_madd4. (ISA_HAS_FUSED_MADD4): Likewise. * gcc/doc/invoke.texi (-mmadd4): Document the new option. * gcc/doc/install.texi (--with-madd4): Document the new option. gcc/testsuite/ 2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> * gcc.target/mips/madd4-1.c: New file. * gcc.target/mips/madd4-2.c: Likewise. * gcc.target/mips/mips.exp (mips_option_groups): Add ghost option HAS_MADD4. (mips_option_groups): Add -m[no-]madd4. (mips-dg-init): Detect default -mno-madd4. (mips-dg-options): Handle HAS_MADD4 arch upgrade/downgrade. * gcc.target/mips/mips-ps-type.c: Add -mmadd4 test option. * gcc.target/mips/mips-ps-type-2.c: Likewise. * gcc.target/mips/nmadd-1.c: Likewise. * gcc.target/mips/nmadd-2.c: Likewise. * gcc.target/mips/nmadd-3.c: Likewise. Co-Authored-By: Yunqiang Su <yunqiang.su@imgtec.com> From-SVN: r244676
This commit is contained in:
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@ -1,3 +1,19 @@
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2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com>
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Yunqiang Su <yunqiang.su@imgtec.com>
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* config.gcc (supported_defaults): Add madd4.
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(with_madd4): Add validation.
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(all_defaults): Add madd4.
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* config/mips/mips.opt (mmadd4): New option.
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* gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for
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mmadd4.
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(TARGET_CPU_CPP_BUILTINS): Add builtin_define for
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__mips_no_madd4.
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(ISA_HAS_UNFUSED_MADD4): Gate with mips_madd4.
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(ISA_HAS_FUSED_MADD4): Likewise.
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* gcc/doc/invoke.texi (-mmadd4): Document the new option.
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* gcc/doc/install.texi (--with-madd4): Document the new option.
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2017-01-19 Jiong Wang <jiong.wang@arm.com>
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* config/aarch64/aarch64-builtins.c (enum aarch64_builtins): New
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@ -3940,7 +3940,7 @@ case "${target}" in
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;;
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mips*-*-*)
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supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1"
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supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4"
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case ${with_float} in
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"" | soft | hard)
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@ -4078,6 +4078,21 @@ case "${target}" in
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exit 1
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;;
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esac
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case ${with_madd4} in
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yes)
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with_madd4=madd4
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;;
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no)
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with_madd4=no-madd4
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;;
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"")
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;;
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*)
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echo "Unknown madd4 type used in --with-madd4" 1>&2
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exit 1
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;;
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esac
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;;
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nds32*-*-*)
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@ -4511,7 +4526,7 @@ case ${target} in
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esac
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t=
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all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1"
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all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4"
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for option in $all_defaults
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do
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eval "val=\$with_"`echo $option | sed s/-/_/g`
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@ -639,6 +639,8 @@ struct mips_cpu_info {
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builtin_define ("__GCC_HAVE_BUILTIN_MIPS_CACHE"); \
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if (!ISA_HAS_LXC1_SXC1) \
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builtin_define ("__mips_no_lxc1_sxc1"); \
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if (!ISA_HAS_UNFUSED_MADD4 && !ISA_HAS_FUSED_MADD4) \
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builtin_define ("__mips_no_madd4"); \
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} \
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while (0)
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@ -869,7 +871,8 @@ struct mips_cpu_info {
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{"llsc", "%{!mllsc:%{!mno-llsc:-m%(VALUE)}}" }, \
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{"mips-plt", "%{!mplt:%{!mno-plt:-m%(VALUE)}}" }, \
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{"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" }, \
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{"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" } \
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{"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" }, \
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{"madd4", "%{!mmadd4:%{!mno-madd4:-m%(VALUE)}}" } \
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/* A spec that infers the:
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-mnan=2008 setting from a -mips argument,
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@ -1066,11 +1069,14 @@ struct mips_cpu_info {
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/* ISA has 4 operand fused madd instructions of the form
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'd = [+-] (a * b [+-] c)'. */
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#define ISA_HAS_FUSED_MADD4 (TARGET_MIPS8000 || TARGET_LOONGSON_3A)
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#define ISA_HAS_FUSED_MADD4 (mips_madd4 \
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&& (TARGET_MIPS8000 \
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|| TARGET_LOONGSON_3A))
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/* ISA has 4 operand unfused madd instructions of the form
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'd = [+-] (a * b [+-] c)'. */
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#define ISA_HAS_UNFUSED_MADD4 (ISA_HAS_FP4 \
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#define ISA_HAS_UNFUSED_MADD4 (mips_madd4 \
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&& ISA_HAS_FP4 \
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&& !TARGET_MIPS8000 \
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&& !TARGET_LOONGSON_3A)
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@ -392,6 +392,10 @@ mlxc1-sxc1
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Target Report Var(mips_lxc1_sxc1) Init(1)
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Use lwxc1/swxc1/ldxc1/sdxc1 instructions where applicable.
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mmadd4
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Target Report Var(mips_madd4) Init(1)
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Use 4-operand madd.s/madd.d and related instructions where applicable.
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mtune=
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Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
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-mtune=PROCESSOR Optimize the output for PROCESSOR.
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@ -1394,6 +1394,20 @@ in @code{lwxc1} type instructions. This assumption holds true in a
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pure 32-bit environment and can hold true in a 64-bit environment if
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the address space is accurately set to be 32-bit for o32 and n32.
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@item --with-madd4
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On MIPS targets, make @option{-mmadd4} the default when no
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@option{-mno-madd4} option is passed. This is the default.
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@item --without-madd4
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On MIPS targets, make @option{-mno-madd4} the default when no
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@option{-mmadd4} option is passed. The @code{madd4} instruction
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family can be problematic when targeting a combination of cores that
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implement these instructions differently. There are two known cores
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that implement these as fused operations instead of unfused (where
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unfused is normally expected). Disabling these instructions is the
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only way to ensure compatible code is generated; this will incur
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a performance penalty.
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@item --with-mips-plt
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On MIPS targets, make use of copy relocations and PLTs.
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These features are extensions to the traditional
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@ -909,7 +909,7 @@ Objective-C and Objective-C++ Dialects}.
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-mcompact-branches=@var{policy} @gol
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-mfp-exceptions -mno-fp-exceptions @gol
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-mvr4130-align -mno-vr4130-align -msynci -mno-synci @gol
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-mlxc1-sxc1 -mno-lxc1-sxc1 @gol
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-mlxc1-sxc1 -mno-lxc1-sxc1 -mmadd4 -mno-madd4 @gol
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-mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address @gol
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-mframe-header-opt -mno-frame-header-opt}
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@ -19950,6 +19950,12 @@ This optimization is off by default at all optimization levels.
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When applicable, enable (disable) the generation of @code{lwxc1},
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@code{swxc1}, @code{ldxc1}, @code{sdxc1} instructions. Enabled by default.
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@item -mmadd4
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@itemx -mno-madd4
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@opindex mmadd4
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When applicable, enable (disable) the generation of 4-operand @code{madd.s},
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@code{madd.d} and related instructions. Enabled by default.
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@end table
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@node MMIX Options
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@ -1,3 +1,18 @@
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2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com>
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* gcc.target/mips/madd4-1.c: New file.
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* gcc.target/mips/madd4-2.c: Likewise.
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* gcc.target/mips/mips.exp (mips_option_groups): Add ghost option
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HAS_MADD4.
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(mips_option_groups): Add -m[no-]madd4.
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(mips-dg-init): Detect default -mno-madd4.
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(mips-dg-options): Handle HAS_MADD4 arch upgrade/downgrade.
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* gcc.target/mips/mips-ps-type.c: Add -mmadd4 test option.
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* gcc.target/mips/mips-ps-type-2.c: Likewise.
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* gcc.target/mips/nmadd-1.c: Likewise.
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* gcc.target/mips/nmadd-2.c: Likewise.
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* gcc.target/mips/nmadd-3.c: Likewise.
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2017-01-19 Jiong Wang <jiong.wang@arm.com>
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* gcc.target/aarch64/return_address_sign_1.c: New testcase for no
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gcc/testsuite/gcc.target/mips/madd4-1.c
Normal file
14
gcc/testsuite/gcc.target/mips/madd4-1.c
Normal file
@ -0,0 +1,14 @@
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/* { dg-do compile } */
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/* { dg-options "-ffast-math -mno-madd4 (HAS_MADD4) -mhard-float" } */
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/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
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/* { dg-final { scan-assembler-not "\tmadd.s\t" } } */
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#ifndef __mips_no_madd4
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#error missing definition of __mips_no_madd4
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#endif
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NOMIPS16 float
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madd4 (float f, float g, float h)
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{
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return (f * g) + h;
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}
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gcc/testsuite/gcc.target/mips/madd4-2.c
Normal file
14
gcc/testsuite/gcc.target/mips/madd4-2.c
Normal file
@ -0,0 +1,14 @@
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/* { dg-do compile } */
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/* { dg-options "-ffast-math -mmadd4 (HAS_MADD4) -mhard-float" } */
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/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
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/* { dg-final { scan-assembler "\tmadd.s\t" } } */
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#ifdef __mips_no_madd4
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#error unexpected definition of __mips_no_madd4
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#endif
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NOMIPS16 float
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madd4 (float f, float g, float h)
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{
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return (f * g) + h;
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}
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/* Test v2sf calculations. The nmadd and nmsub patterns need
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-ffinite-math-only. */
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/* { dg-do compile } */
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/* { dg-options "(HAS_MADDPS) -mgp32 -mpaired-single -ffinite-math-only forbid_cpu=octeon.*" } */
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/* { dg-options "(HAS_MADDPS) -mmadd4 -mgp32 -mpaired-single -ffinite-math-only forbid_cpu=octeon.*" } */
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/* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" } } */
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/* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */
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/* { dg-final { scan-assembler "\tmov.ps\t" } } */
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/* Test v2sf calculations. The nmadd and nmsub patterns need
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-ffinite-math-only. */
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/* { dg-do compile } */
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/* { dg-options "-mpaired-single -mgp64 -ffinite-math-only forbid_cpu=octeon.*" } */
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/* { dg-options "-mpaired-single -mmadd4 -mgp64 -ffinite-math-only forbid_cpu=octeon.*" } */
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/* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" } } */
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/* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */
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/* { dg-final { scan-assembler "\tmov.ps\t" } } */
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ldc "HAS_LDC"
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movn "HAS_MOVN"
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madd "HAS_MADD"
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madd4_ghost "HAS_MADD4"
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maddps "HAS_MADDPS"
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lsa "(|!)HAS_LSA"
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lxc1 "HAS_LXC1"
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@ -284,6 +285,7 @@ foreach option {
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local-sdata
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long-calls
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lxc1-sxc1
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madd4
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paired-single
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plt
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shared
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@ -863,6 +865,12 @@ proc mips-dg-init {} {
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"-mlxc1-sxc1"
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#endif
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#ifdef __mips_no_madd4
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"-mno-madd4"
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#else
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"-mmadd4"
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#endif
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#ifdef __mips_synci
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"-msynci",
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#else
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@ -1182,6 +1190,7 @@ proc mips-dg-options { args } {
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#
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} elseif { $isa < 4
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&& ([mips_have_test_option_p options "HAS_LXC1"]
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|| [mips_have_test_option_p options "HAS_MADD4"]
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|| [mips_have_test_option_p options "HAS_MOVN"]) } {
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mips_make_test_option options "-mips4"
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# We need MIPS III or higher for:
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@ -1224,8 +1233,9 @@ proc mips-dg-options { args } {
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|| [mips_have_test_option_p options "-mfix-r10000"]
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|| [mips_have_test_option_p options "NOT_HAS_DMUL"]
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|| [mips_have_test_option_p options "HAS_LXC1"]
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|| [mips_have_test_option_p options "HAS_MOVN"]
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|| [mips_have_test_option_p options "HAS_MADD"]
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|| [mips_have_test_option_p options "HAS_MADD4"]
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|| [mips_have_test_option_p options "HAS_MOVN"]
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|| [mips_have_test_option_p options "-mpaired-single"]
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|| [mips_have_test_option_p options "-mnan=legacy"]
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|| [mips_have_test_option_p options "-mabs=legacy"]
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@ -1,5 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-ffast-math isa=4 -mhard-float" } */
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/* { dg-options "-ffast-math -mmadd4 isa=4 -mhard-float" } */
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/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
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/* { dg-final { scan-assembler "\tnmadd.s\t" } } */
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/* { dg-final { scan-assembler "\tnmadd.d\t" } } */
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@ -1,5 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-fno-fast-math -ffinite-math-only isa=4 -mhard-float" } */
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/* { dg-options "-fno-fast-math -ffinite-math-only -mmadd4 isa=4 -mhard-float" } */
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/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
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/* { dg-final { scan-assembler "\tnmadd.s\t" } } */
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/* { dg-final { scan-assembler "\tnmadd.d\t" } } */
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/* The same code as nmadd-2.c, but compiled with -fno-finite-math-only.
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We can't use nmadd and nmsub in that case. */
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/* { dg-do compile } */
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/* { dg-options "-fno-fast-math -fno-finite-math-only isa=4 -mhard-float" } */
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/* { dg-options "-fno-fast-math -fno-finite-math-only -mmadd4 isa=4 -mhard-float" } */
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/* { dg-final { scan-assembler-not "\tnmadd" } } */
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/* { dg-final { scan-assembler-not "\tnmsub" } } */
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