rs6000.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
* config/rs6000/rs6000.h (CLZ_DEFINED_VALUE_AT_ZERO): Define. * config/rs6000/rs6000.md (clzsi2): Rename from cntlzw2. (ffssi2): Use clz instead of unspec. (clzdi2): Rename from cntlzd2. (ffsdi2): Use clz instead of unspec. From-SVN: r62570
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@ -1,3 +1,11 @@
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2003-02-07 David Edelsohn <edelsohn@gnu.org>
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* config/rs6000/rs6000.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
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* config/rs6000/rs6000.md (clzsi2): Rename from cntlzw2.
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(ffssi2): Use clz instead of unspec.
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(clzdi2): Rename from cntlzd2.
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(ffsdi2): Use clz instead of unspec.
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2003-02-07 Loren James Rittle <ljrittle@acm.org>
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2003-02-07 Loren James Rittle <ljrittle@acm.org>
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* config/alpha/freebsd.h (LINK_SPEC): Weaken error to notice.
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* config/alpha/freebsd.h (LINK_SPEC): Weaken error to notice.
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@ -2270,6 +2270,10 @@ do { \
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is done just by pretending it is already truncated. */
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is done just by pretending it is already truncated. */
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#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
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#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
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/* The cntlzw and cntlzd instructions return 32 and 64 for zero. */
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#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
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((VALUE) = ((MODE) == SImode ? 32 : 64))
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/* Specify the machine mode that pointers have.
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/* Specify the machine mode that pointers have.
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After generation of rtl, the compiler makes no further distinction
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After generation of rtl, the compiler makes no further distinction
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between pointers and any other objects of this machine mode. */
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between pointers and any other objects of this machine mode. */
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@ -2371,7 +2371,7 @@
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(parallel [(set (match_dup 3) (and:SI (match_dup 1)
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(parallel [(set (match_dup 3) (and:SI (match_dup 1)
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(match_dup 2)))
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(match_dup 2)))
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(clobber (scratch:CC))])
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(clobber (scratch:CC))])
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(set (match_dup 4) (unspec:SI [(match_dup 3)] 21))
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(set (match_dup 4) (clz:SI (match_dup 3)))
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(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(minus:SI (const_int 32) (match_dup 4)))]
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(minus:SI (const_int 32) (match_dup 4)))]
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""
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""
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@ -2381,9 +2381,9 @@
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operands[4] = gen_reg_rtx (SImode);
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operands[4] = gen_reg_rtx (SImode);
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})
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})
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(define_insn "cntlzw2"
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(define_insn "clzsi2"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(unspec:SI [(match_operand:SI 1 "gpc_reg_operand" "r")] 21))]
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(clz:SI (match_operand:SI 1 "gpc_reg_operand" "r")))]
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""
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""
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"{cntlz|cntlzw} %0,%1")
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"{cntlz|cntlzw} %0,%1")
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@ -6746,7 +6746,7 @@
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(parallel [(set (match_dup 3) (and:DI (match_dup 1)
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(parallel [(set (match_dup 3) (and:DI (match_dup 1)
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(match_dup 2)))
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(match_dup 2)))
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(clobber (scratch:CC))])
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(clobber (scratch:CC))])
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(set (match_dup 4) (unspec:DI [(match_dup 3)] 21))
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(set (match_dup 4) (clz:DI (match_dup 3)))
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(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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(minus:DI (const_int 64) (match_dup 4)))]
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(minus:DI (const_int 64) (match_dup 4)))]
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"TARGET_POWERPC64"
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"TARGET_POWERPC64"
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@ -6756,9 +6756,9 @@
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operands[4] = gen_reg_rtx (DImode);
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operands[4] = gen_reg_rtx (DImode);
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})
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})
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(define_insn "cntlzd2"
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(define_insn "clzdi2"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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(unspec:DI [(match_operand:DI 1 "gpc_reg_operand" "r")] 21))]
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(clz:DI (match_operand:DI 1 "gpc_reg_operand" "r")))]
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"TARGET_POWERPC64"
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"TARGET_POWERPC64"
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"cntlzd %0,%1")
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"cntlzd %0,%1")
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