diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0802010e79b..e9a584c11dc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Sat Apr 17 11:25:44 1999 Michael Hayes + + * config/c4x/c4x.md (mulqf3_clrqf_clobber, mulqi3_clrqi_clobber): + New patterns to support parallel multiply and load of zero. + Fri Apr 16 01:23:47 1999 Jason Merrill * tree.c (valid_machine_attribute): If we're modifying the diff --git a/gcc/config/c4x/c4x.md b/gcc/config/c4x/c4x.md index 97f67a5c4d6..55c85d977db 100644 --- a/gcc/config/c4x/c4x.md +++ b/gcc/config/c4x/c4x.md @@ -4041,6 +4041,21 @@ "mpyf3\\t%2,%1,%0\\n||\\tsubf3\\t%5,%4,%3" [(set_attr "type" "binarycc")]) +; +; MPYF/LDF 0 +; + +(define_insn "*mulqf3_clrqf_clobber" + [(set (match_operand:QF 0 "r0r1_reg_operand" "=t") + (mult:QF (match_operand:QF 1 "par_ind_operand" "S<>") + (match_operand:QF 2 "par_ind_operand" "S<>"))) + (set (match_operand:QF 3 "r2r3_reg_operand" "=u") + (match_operand:QF 4 "fp_zero_operand" "G")) + (clobber (reg:CC 21))] + "TARGET_PARALLEL_MPY" + "mpyf3\\t%2,%1,%0\\n||\\tsubf3\\t%3,%3,%3" + [(set_attr "type" "binarycc")]) + ; ; NEGF/STF ; @@ -4073,7 +4088,6 @@ ; ; PARALLEL INTEGER INSTRUCTIONS ; -; These patterns are under development ; ; ABSI/STI @@ -4195,6 +4209,7 @@ "mpyi3\\t%2,%1,%0\\n||\\taddi3\\t%5,%4,%3" [(set_attr "type" "binarycc")]) + ; ; MPYI/STI ; @@ -4228,6 +4243,21 @@ "mpyi3\\t%2,%1,%0\\n||\\tsubi3\\t%5,%4,%3" [(set_attr "type" "binarycc")]) +; +; MPYI/LDI 0 +; + +(define_insn "*mulqi3_clrqi_clobber" + [(set (match_operand:QI 0 "r0r1_reg_operand" "=t") + (mult:QI (match_operand:QI 1 "par_ind_operand" "S<>") + (match_operand:QI 2 "par_ind_operand" "S<>"))) + (set (match_operand:QI 3 "r2r3_reg_operand" "=u") + (const_int 0)) + (clobber (reg:CC 21))] + "TARGET_PARALLEL_MPY && TARGET_MPYI" + "mpyi3\\t%2,%1,%0\\n||\\tsubi3\\t%3,%3,%3" + [(set_attr "type" "binarycc")]) + ; ; NEGI/STI ;