testsuite: aarch64: Add fusion tests for FP vml[as] intrinsics
Add compilation tests to make sure that the output of vmla/vmls floating-point Neon intrinsics (fmul, fadd/fsub) is not fused into fmla/fmls instructions. gcc/testsuite/ChangeLog: 2021-02-16 Jonathan Wright <jonathan.wright@arm.com> * gcc.target/aarch64/advsimd-intrinsics/vmla_float_not_fused.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vmls_float_not_fused.c: New test.
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/* { dg-skip-if "" { arm*-*-* } } */
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/* { dg-do compile } */
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/* { dg-options "-O3" } */
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#include <arm_neon.h>
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float32x2_t foo_f32 (float32x2_t a, float32x2_t b, float32x2_t c)
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{
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return vmla_f32 (a, b, c);
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}
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float32x4_t fooq_f32 (float32x4_t a, float32x4_t b, float32x4_t c)
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{
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return vmlaq_f32 (a, b, c);
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}
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float32x2_t foo_n_f32 (float32x2_t a, float32x2_t b, float32_t c)
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{
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return vmla_n_f32 (a, b, c);
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}
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float32x4_t fooq_n_f32 (float32x4_t a, float32x4_t b, float32_t c)
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{
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return vmlaq_n_f32 (a, b, c);
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}
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float32x2_t foo_lane_f32 (float32x2_t a,
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float32x2_t b,
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float32x2_t v)
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{
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return vmla_lane_f32 (a, b, v, 0);
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}
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float32x4_t fooq_lane_f32 (float32x4_t a,
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float32x4_t b,
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float32x2_t v)
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{
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return vmlaq_lane_f32 (a, b, v, 0);
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}
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float32x2_t foo_laneq_f32 (float32x2_t a,
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float32x2_t b,
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float32x4_t v)
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{
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return vmla_laneq_f32 (a, b, v, 0);
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}
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float32x4_t fooq_laneq_f32 (float32x4_t a,
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float32x4_t b,
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float32x4_t v)
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{
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return vmlaq_laneq_f32 (a, b, v, 0);
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}
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float64x1_t foo_f64 (float64x1_t a, float64x1_t b, float64x1_t c)
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{
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return vmla_f64 (a, b, c);
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}
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float64x2_t fooq_f64 (float64x2_t a, float64x2_t b, float64x2_t c)
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{
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return vmlaq_f64 (a, b, c);
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}
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/* { dg-final { scan-assembler-times {\tfmul\t} 10} } */
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/* { dg-final { scan-assembler-times {\tfadd\t} 10} } */
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/* { dg-skip-if "" { arm*-*-* } } */
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/* { dg-do compile } */
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/* { dg-options "-O3" } */
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#include <arm_neon.h>
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float32x2_t foo_f32 (float32x2_t a, float32x2_t b, float32x2_t c)
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{
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return vmls_f32 (a, b, c);
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}
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float32x4_t fooq_f32 (float32x4_t a, float32x4_t b, float32x4_t c)
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{
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return vmlsq_f32 (a, b, c);
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}
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float32x2_t foo_n_f32 (float32x2_t a, float32x2_t b, float32_t c)
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{
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return vmls_n_f32 (a, b, c);
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}
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float32x4_t fooq_n_f32 (float32x4_t a, float32x4_t b, float32_t c)
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{
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return vmlsq_n_f32 (a, b, c);
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}
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float32x2_t foo_lane_f32 (float32x2_t a,
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float32x2_t b,
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float32x2_t v)
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{
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return vmls_lane_f32 (a, b, v, 0);
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}
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float32x4_t fooq_lane_f32 (float32x4_t a,
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float32x4_t b,
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float32x2_t v)
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{
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return vmlsq_lane_f32 (a, b, v, 0);
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}
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float32x2_t foo_laneq_f32 (float32x2_t a,
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float32x2_t b,
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float32x4_t v)
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{
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return vmls_laneq_f32 (a, b, v, 0);
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}
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float32x4_t fooq_laneq_f32 (float32x4_t a,
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float32x4_t b,
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float32x4_t v)
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{
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return vmlsq_laneq_f32 (a, b, v, 0);
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}
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float64x1_t foo_f64 (float64x1_t a, float64x1_t b, float64x1_t c)
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{
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return vmls_f64 (a, b, c);
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}
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float64x2_t fooq_f64 (float64x2_t a, float64x2_t b, float64x2_t c)
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{
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return vmlsq_f64 (a, b, c);
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}
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/* { dg-final { scan-assembler-times {\tfmul\t} 10} } */
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/* { dg-final { scan-assembler-times {\tfsub\t} 10} } */
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