ChangeLog.7: Fix comment typos.
* ChangeLog.7: Fix comment typos. * c-common.c: Likewise. * c-pretty-print.c: Likewise. * cgraphunit.c: Likewise. * et-forest.h: Likewise. * expr.c: Likewise. * gcse.c: Likewise. * genautomata.c: Likewise. * genrecog.c: Likewise. * gensupport.c: Likewise. * ggc-zone.c: Likewise. * haifa-sched.c: Likewise. * ifcvt.c: Likewise. * loop.c: Likewise. * optabs.c: Likewise. * pretty-print.h: Likewise. * regrename.c: Likewise. * rtl.h: Likewise. * sched-rgn.c: Likewise. * target.h: Likewise. * value-prof.c: Likewise. * web.c: Likewise. From-SVN: r73795
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@ -12648,7 +12648,7 @@ Thu Mar 28 16:35:31 2002 Jeffrey A Law (law@redhat.com)
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Thu Mar 28 19:13:36 CET 2002 Jan Hubicka <jh@suse.cz>
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* ifcvt.c (if_convert): Clear aux_for_blocks early enought.
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* ifcvt.c (if_convert): Clear aux_for_blocks early enough.
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Thu Mar 28 13:21:53 CET 2002 Jan Hubicka <jh@suse.cz>
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@ -5774,7 +5774,7 @@ c_estimate_num_insns_1 (tree *tp, int *walk_subtrees, void *data)
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return NULL;
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switch (TREE_CODE (x))
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{
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/* Reconginze assignments of large structures and constructors of
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/* Recognize assignments of large structures and constructors of
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big arrays. */
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case MODIFY_EXPR:
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case CONSTRUCTOR:
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@ -1820,7 +1820,7 @@ pp_c_expression (c_pretty_printer *pp, tree e)
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/* statement:
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labeled-statement
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coumpound-statement
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compound-statement
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expression-statement
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selection-statement
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iteration-statement
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@ -1870,7 +1870,7 @@ pp_c_statement (c_pretty_printer *pp, tree stmt)
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pp_needs_newline (pp) = true;
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break;
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/* coumpound-statement:
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/* compound-statement:
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{ block-item-list(opt) }
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block-item-list:
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@ -931,7 +931,7 @@ cgraph_default_inline_p (struct cgraph_node *n)
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All inline candidates are put into prioritized heap based on estimated
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growth of the overall number of instructions and then update the estimates.
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INLINED and INLINED_CALEES are just pointers to arrays large enought
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INLINED and INLINED_CALEES are just pointers to arrays large enough
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to be passed to cgraph_inlined_into and cgraph_inlined_callees. */
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static void
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@ -20,7 +20,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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for tree operations (insertion and removal of nodes and edges) and
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poly-logarithmic time for nearest common ancestor.
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ET tree stores its structue as a sequence of symbols obtained
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ET tree stores its structure as a sequence of symbols obtained
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by dfs(root)
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dfs (node)
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@ -9341,7 +9341,7 @@ expand_increment (tree exp, int post, int ignore)
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{
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/* We have a true reference to the value in OP0.
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If there is an insn to add or subtract in this mode, queue it.
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Queueing the increment insn avoids the register shuffling
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Queuing the increment insn avoids the register shuffling
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that often results if we must increment now and first save
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the old value for subsequent use. */
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@ -2205,7 +2205,7 @@ hash_scan_set (rtx pat, rtx insn, struct hash_table *table)
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&& oprs_available_p (pat, tmp))))
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insert_set_in_table (pat, insn, table);
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}
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/* In case of store we want to consider the memory value as avaiable in
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/* In case of store we want to consider the memory value as available in
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the REG stored in that memory. This makes it possible to remove
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redundant loads from due to stores to the same location. */
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else if (flag_gcse_las && GET_CODE (src) == REG && GET_CODE (dest) == MEM)
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@ -6282,7 +6282,7 @@ merge_states (automaton_t automaton, vla_ptr_t *equiv_classes)
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}
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}
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/* Its is important that alt states were sorted before and
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after merging to have the same quering results. */
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after merging to have the same querying results. */
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new_state->component_states = uniq_sort_alt_states (alt_states);
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}
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else
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@ -633,7 +633,7 @@ validate_pattern (rtx pattern, rtx insn, rtx set, int set_code)
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if (GET_CODE (dest) == STRICT_LOW_PART)
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dest = XEXP (dest, 0);
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/* Find the referant for a DUP. */
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/* Find the referent for a DUP. */
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if (GET_CODE (dest) == MATCH_DUP
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|| GET_CODE (dest) == MATCH_OP_DUP
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@ -259,7 +259,7 @@ process_include (rtx desc, int lineno)
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fclose (input_file);
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}
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/* Process a top level rtx in some way, queueing as appropriate. */
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/* Process a top level rtx in some way, queuing as appropriate. */
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static void
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process_rtx (rtx desc, int lineno)
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@ -1001,7 +1001,7 @@ ggc_alloc_zone_1 (size_t size, struct alloc_zone *zone, short type)
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return result;
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}
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/* Allocate a SIZE of chunk memory of GTE type, into an approriate zone
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/* Allocate a SIZE of chunk memory of GTE type, into an appropriate zone
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for that type. */
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void *
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@ -1288,7 +1288,7 @@ sweep_pages (struct alloc_zone *zone)
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}
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/* Large pages are all or none affairs. Either they are
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completely empty, or they are completeley full.
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completely empty, or they are completely full.
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Thus, if the above didn't catch it, we need not do anything
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except remove the mark and reset the bytes_free.
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@ -973,7 +973,7 @@ priority (rtx insn)
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}
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/* Macros and functions for keeping the priority queue sorted, and
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dealing with queueing and dequeueing of instructions. */
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dealing with queuing and dequeuing of instructions. */
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#define SCHED_SORT(READY, N_READY) \
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do { if ((N_READY) == 2) \
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@ -1652,7 +1652,7 @@ noce_try_abs (struct noce_if_info *if_info)
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target = expand_abs_nojump (GET_MODE (if_info->x), b, if_info->x, 1);
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/* ??? It's a quandry whether cmove would be better here, especially
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/* ??? It's a quandary whether cmove would be better here, especially
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for integers. Perhaps combine will clean things up. */
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if (target && negate)
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target = expand_simple_unop (GET_MODE (target), NEG, target, if_info->x, 0);
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@ -6223,7 +6223,7 @@ basic_induction_var (const struct loop *loop, rtx x, enum machine_mode mode,
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/* convert_modes can emit new instructions, e.g. when arg is a loop
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invariant MEM and dest_reg has a different mode.
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These instructions would be emitted after the end of the function
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and then *inc_val would be an unitialized pseudo.
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and then *inc_val would be an uninitialized pseudo.
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Detect this and bail in this case.
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Other alternatives to solve this can be introducing a convert_modes
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variant which is allowed to fail but not allowed to emit new
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@ -5371,7 +5371,7 @@ init_optabs (void)
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abs_optab->handlers[TYPE_MODE (complex_double_type_node)].libfunc
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= init_one_libfunc ("cabs");
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/* The ffs function op[1erates on `int'. */
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/* The ffs function operates on `int'. */
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ffs_optab->handlers[(int) mode_for_size (INT_TYPE_SIZE, MODE_INT, 0)].libfunc
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= init_one_libfunc ("ffs");
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@ -234,7 +234,7 @@ struct pretty_print_info
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#define pp_buffer(PP) pp_base (PP)->buffer
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/* Clients that directly derive from pretty_printer need to override
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this macro to return a pointer to the base pretty_printer structrure. */
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this macro to return a pointer to the base pretty_printer structure. */
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#define pp_base(PP) (PP)
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extern void pp_construct (pretty_printer *, const char *, int);
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@ -1734,7 +1734,7 @@ copyprop_hardreg_forward (void)
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/* If a block has a single predecessor, that we've already
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processed, begin with the value data that was live at
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the end of the predecessor block. */
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/* ??? Ought to use more intelligent queueing of blocks. */
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/* ??? Ought to use more intelligent queuing of blocks. */
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if (bb->pred)
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for (bbp = bb; bbp && bbp != bb->pred->src; bbp = bbp->prev_bb);
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if (bb->pred
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@ -1742,7 +1742,7 @@ rtx alloc_EXPR_LIST (int, rtx, rtx);
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/* regclass.c */
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/* Maximum number of parallel sets and clobbers in any insn in this fn.
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Always at least 3, since the combiner could put that many togetherm
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Always at least 3, since the combiner could put that many together
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and we want this to remain correct for all the remaining passes. */
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extern int max_parallel;
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@ -2036,7 +2036,7 @@ add_branch_dependences (rtx head, rtx tail)
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end since moving them results in worse register allocation. Uses remain
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at the end to ensure proper register allocation.
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cc0 setters remaim at the end because they can't be moved away from
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cc0 setters remain at the end because they can't be moved away from
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their cc0 user.
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Insns setting CLASS_LIKELY_SPILLED_P registers (usually return values)
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@ -207,7 +207,7 @@ struct gcc_target
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correspondingly starts and finishes. The function defined by
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init_dfa_pre_cycle_insn and init_dfa_post_cycle_insn are used
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to initialize the corresponding insns. The default values of
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the memebers result in not changing the automaton state when
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the members result in not changing the automaton state when
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the new simulated processor cycle correspondingly starts and
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finishes. */
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void (* init_dfa_pre_cycle_insn) (void);
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@ -132,7 +132,7 @@ insn_divmod_values_to_profile (rtx insn, unsigned *n_values,
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(*n_values)++;
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}
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/* For mod, check whether it is not often a noop (or replacable by
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/* For mod, check whether it is not often a noop (or replaceable by
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a few subtractions). */
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if (GET_CODE (set_src) == UMOD && !side_effects_p (op1))
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{
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histogram = XEXP (histogram, 1);
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all = INTVAL (XEXP (histogram, 0));
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/* We requiere that count is at least half of all; this means
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/* We require that count is at least half of all; this means
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that for the transformation to fire the value must be constant
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at least 50% of time (and 75% gives the garantee of usage). */
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at least 50% of time (and 75% gives the guarantee of usage). */
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if (!rtx_equal_p (op2, value) || 2 * count < all)
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return false;
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@ -20,7 +20,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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/* Simple optimization pass that splits independent uses of each pseudo,
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increasing effectivity of other optimizations. The optimization can
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increasing effectiveness of other optimizations. The optimization can
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serve as an example of use for the dataflow module.
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We don't split registers with REG_USERVAR set unless -fmessy-debugging
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