re PR target/64479 ([SH] wrong optimization delayed-branch)
gcc/ PR target/64479 * rtlanal.c (set_reg_p): Handle SEQUENCE constructs. From-SVN: r219506
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@ -1,3 +1,8 @@
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2015-01-13 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/64479
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* rtlanal.c (set_reg_p): Handle SEQUENCE constructs.
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2015-01-12 Kaz Kojima <kkojima@gcc.gnu.org>
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* config/sh/sh.c (sh_atomic_assign_expand_fenv): New function.
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@ -1000,6 +1000,17 @@ reg_set_between_p (const_rtx reg, const rtx_insn *from_insn,
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int
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reg_set_p (const_rtx reg, const_rtx insn)
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{
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/* After delay slot handling, call and branch insns might be in a
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sequence. Check all the elements there. */
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if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
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{
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for (int i = 0; i < XVECLEN (PATTERN (insn), 0); ++i)
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if (reg_set_p (reg, XVECEXP (PATTERN (insn), 0, i)))
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return true;
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return false;
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}
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/* We can be passed an insn or part of one. If we are passed an insn,
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check if a side-effect of the insn clobbers REG. */
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if (INSN_P (insn)
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@ -1011,7 +1022,7 @@ reg_set_p (const_rtx reg, const_rtx insn)
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GET_MODE (reg), REGNO (reg)))
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|| MEM_P (reg)
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|| find_reg_fusage (insn, CLOBBER, reg)))))
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return 1;
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return true;
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return set_of (reg, insn) != NULL_RTX;
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}
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