Fix miscompilation of Ada runtime on 64-bit SPARC

Returning a REGMODE_NATURAL_SIZE of 4 for DFmode in 64-bit mode is
just asking for trouble because sub-word SUBREGs are always treated
differently than the others, in particular by the register allocator.

gcc/
	* config/sparc/sparc.c (sparc_regmode_natural_size): Return 4 for
	float and vector integer modes only if the mode is not larger.
This commit is contained in:
Eric Botcazou 2021-03-10 12:02:14 +01:00
parent e7afb82c35
commit da7343a6f4
1 changed files with 5 additions and 10 deletions

View File

@ -13585,23 +13585,18 @@ sparc_expand_vcond (machine_mode mode, rtx *operands, int ccode, int fcode)
emit_insn (gen_rtx_SET (operands[0], bshuf));
}
/* On sparc, any mode which naturally allocates into the float
/* On the SPARC, any mode which naturally allocates into the single float
registers should return 4 here. */
unsigned int
sparc_regmode_natural_size (machine_mode mode)
{
int size = UNITS_PER_WORD;
const enum mode_class cl = GET_MODE_CLASS (mode);
if (TARGET_ARCH64)
{
enum mode_class mclass = GET_MODE_CLASS (mode);
if ((cl == MODE_FLOAT || cl == MODE_VECTOR_INT) && GET_MODE_SIZE (mode) <= 4)
return 4;
if (mclass == MODE_FLOAT || mclass == MODE_VECTOR_INT)
size = 4;
}
return size;
return UNITS_PER_WORD;
}
/* Implement TARGET_HARD_REGNO_NREGS.