rs6000.c (special_handling_values): Add SH_SPLAT.
[gcc] 2014-09-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/rs6000.c (special_handling_values): Add SH_SPLAT. (rtx_is_swappable_p): Convert UNSPEC cascading ||s to a switch statement; allow optimization of UNSPEC_VSPLT_DIRECT with special handling SH_SPLAT. (adjust_extract): Fix test for VEC_DUPLICATE case; fix adjustment of extracted lane. (adjust_splat): New function. (handle_special_swappables): Call adjust_splat for SH_SPLAT. (dump_swap_insn_table): Add case for SH_SPLAT. [gcc/testsuite] 2014-09-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/swaps-p8-16.c: New test. From-SVN: r215019
This commit is contained in:
Bill Schmidt
William Schmidt
parent
33d9078ac5
commit
db09274d91
@ -1,3 +1,15 @@
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2014-09-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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* config/rs6000/rs6000.c (special_handling_values): Add SH_SPLAT.
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(rtx_is_swappable_p): Convert UNSPEC cascading ||s to a switch
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statement; allow optimization of UNSPEC_VSPLT_DIRECT with special
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handling SH_SPLAT.
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(adjust_extract): Fix test for VEC_DUPLICATE case; fix adjustment
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of extracted lane.
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(adjust_splat): New function.
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(handle_special_swappables): Call adjust_splat for SH_SPLAT.
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(dump_swap_insn_table): Add case for SH_SPLAT.
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2014-09-08 Richard Biener <rguenther@suse.de>
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PR ipa/63196
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@ -33524,7 +33524,8 @@ enum special_handling_values {
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SH_SUBREG,
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SH_NOSWAP_LD,
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SH_NOSWAP_ST,
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SH_EXTRACT
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SH_EXTRACT,
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SH_SPLAT
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};
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/* Union INSN with all insns containing definitions that reach USE.
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@ -33735,43 +33736,50 @@ rtx_is_swappable_p (rtx op, unsigned int *special)
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vector splat are element-order sensitive. A few of these
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cases might be workable with special handling if required. */
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int val = XINT (op, 1);
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if (val == UNSPEC_VMRGH_DIRECT
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|| val == UNSPEC_VMRGL_DIRECT
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|| val == UNSPEC_VPACK_SIGN_SIGN_SAT
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|| val == UNSPEC_VPACK_SIGN_UNS_SAT
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|| val == UNSPEC_VPACK_UNS_UNS_MOD
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|| val == UNSPEC_VPACK_UNS_UNS_MOD_DIRECT
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|| val == UNSPEC_VPACK_UNS_UNS_SAT
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|| val == UNSPEC_VPERM
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|| val == UNSPEC_VPERM_UNS
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|| val == UNSPEC_VPERMHI
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|| val == UNSPEC_VPERMSI
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|| val == UNSPEC_VPKPX
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|| val == UNSPEC_VSLDOI
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|| val == UNSPEC_VSLO
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|| val == UNSPEC_VSPLT_DIRECT
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|| val == UNSPEC_VSRO
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|| val == UNSPEC_VSUM2SWS
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|| val == UNSPEC_VSUM4S
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|| val == UNSPEC_VSUM4UBS
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|| val == UNSPEC_VSUMSWS
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|| val == UNSPEC_VSUMSWS_DIRECT
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|| val == UNSPEC_VSX_CONCAT
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|| val == UNSPEC_VSX_CVSPDP
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|| val == UNSPEC_VSX_CVSPDPN
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|| val == UNSPEC_VSX_SET
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|| val == UNSPEC_VSX_SLDWI
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|| val == UNSPEC_VUNPACK_HI_SIGN
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|| val == UNSPEC_VUNPACK_HI_SIGN_DIRECT
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|| val == UNSPEC_VUNPACK_LO_SIGN
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|| val == UNSPEC_VUNPACK_LO_SIGN_DIRECT
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|| val == UNSPEC_VUPKHPX
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|| val == UNSPEC_VUPKHS_V4SF
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|| val == UNSPEC_VUPKHU_V4SF
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|| val == UNSPEC_VUPKLPX
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|| val == UNSPEC_VUPKLS_V4SF
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|| val == UNSPEC_VUPKHU_V4SF)
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return 0;
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switch (val)
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{
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default:
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break;
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case UNSPEC_VMRGH_DIRECT:
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case UNSPEC_VMRGL_DIRECT:
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case UNSPEC_VPACK_SIGN_SIGN_SAT:
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case UNSPEC_VPACK_SIGN_UNS_SAT:
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case UNSPEC_VPACK_UNS_UNS_MOD:
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case UNSPEC_VPACK_UNS_UNS_MOD_DIRECT:
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case UNSPEC_VPACK_UNS_UNS_SAT:
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case UNSPEC_VPERM:
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case UNSPEC_VPERM_UNS:
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case UNSPEC_VPERMHI:
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case UNSPEC_VPERMSI:
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case UNSPEC_VPKPX:
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case UNSPEC_VSLDOI:
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case UNSPEC_VSLO:
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case UNSPEC_VSRO:
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case UNSPEC_VSUM2SWS:
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case UNSPEC_VSUM4S:
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case UNSPEC_VSUM4UBS:
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case UNSPEC_VSUMSWS:
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case UNSPEC_VSUMSWS_DIRECT:
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case UNSPEC_VSX_CONCAT:
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case UNSPEC_VSX_CVSPDP:
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case UNSPEC_VSX_CVSPDPN:
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case UNSPEC_VSX_SET:
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case UNSPEC_VSX_SLDWI:
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case UNSPEC_VUNPACK_HI_SIGN:
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case UNSPEC_VUNPACK_HI_SIGN_DIRECT:
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case UNSPEC_VUNPACK_LO_SIGN:
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case UNSPEC_VUNPACK_LO_SIGN_DIRECT:
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case UNSPEC_VUPKHPX:
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case UNSPEC_VUPKHS_V4SF:
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case UNSPEC_VUPKHU_V4SF:
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case UNSPEC_VUPKLPX:
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case UNSPEC_VUPKLS_V4SF:
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case UNSPEC_VUPKLU_V4SF:
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return 0;
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case UNSPEC_VSPLT_DIRECT:
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*special = SH_SPLAT;
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return 1;
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}
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}
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default:
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@ -34098,20 +34106,20 @@ permute_store (rtx_insn *insn)
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INSN_UID (insn));
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}
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/* Given OP that contains a vector extract operation, change the index
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of the extracted lane to count from the other side of the vector. */
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/* Given OP that contains a vector extract operation, adjust the index
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of the extracted lane to account for the doubleword swap. */
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static void
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adjust_extract (rtx_insn *insn)
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{
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rtx body = PATTERN (insn);
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rtx src = SET_SRC (PATTERN (insn));
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/* The vec_select may be wrapped in a vec_duplicate for a splat, so
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account for that. */
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rtx sel = (GET_CODE (body) == VEC_DUPLICATE
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? XEXP (XEXP (body, 0), 1)
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: XEXP (body, 1));
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rtx sel = GET_CODE (src) == VEC_DUPLICATE ? XEXP (src, 0) : src;
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rtx par = XEXP (sel, 1);
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int nunits = GET_MODE_NUNITS (GET_MODE (XEXP (sel, 0)));
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XVECEXP (par, 0, 0) = GEN_INT (nunits - 1 - INTVAL (XVECEXP (par, 0, 0)));
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int half_elts = GET_MODE_NUNITS (GET_MODE (XEXP (sel, 0))) >> 1;
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int lane = INTVAL (XVECEXP (par, 0, 0));
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lane = lane >= half_elts ? lane - half_elts : lane + half_elts;
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XVECEXP (par, 0, 0) = GEN_INT (lane);
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INSN_CODE (insn) = -1; /* Force re-recognition. */
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df_insn_rescan (insn);
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@ -34119,6 +34127,24 @@ adjust_extract (rtx_insn *insn)
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fprintf (dump_file, "Changing lane for extract %d\n", INSN_UID (insn));
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}
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/* Given OP that contains a vector direct-splat operation, adjust the index
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of the source lane to account for the doubleword swap. */
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static void
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adjust_splat (rtx_insn *insn)
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{
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rtx body = PATTERN (insn);
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rtx unspec = XEXP (body, 1);
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int half_elts = GET_MODE_NUNITS (GET_MODE (unspec)) >> 1;
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int lane = INTVAL (XVECEXP (unspec, 0, 1));
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lane = lane >= half_elts ? lane - half_elts : lane + half_elts;
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XVECEXP (unspec, 0, 1) = GEN_INT (lane);
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INSN_CODE (insn) = -1; /* Force re-recognition. */
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df_insn_rescan (insn);
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if (dump_file)
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fprintf (dump_file, "Changing lane for splat %d\n", INSN_UID (insn));
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}
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/* The insn described by INSN_ENTRY[I] can be swapped, but only
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with special handling. Take care of that here. */
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static void
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@ -34160,6 +34186,11 @@ handle_special_swappables (swap_web_entry *insn_entry, unsigned i)
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case SH_EXTRACT:
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/* Change the lane on an extract operation. */
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adjust_extract (insn);
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break;
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case SH_SPLAT:
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/* Change the lane on a direct-splat operation. */
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adjust_splat (insn);
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break;
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}
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}
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@ -34230,6 +34261,8 @@ dump_swap_insn_table (swap_web_entry *insn_entry)
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fputs ("special:store ", dump_file);
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else if (insn_entry[i].special_handling == SH_EXTRACT)
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fputs ("special:extract ", dump_file);
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else if (insn_entry[i].special_handling == SH_SPLAT)
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fputs ("special:splat ", dump_file);
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}
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if (insn_entry[i].web_not_optimizable)
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fputs ("unoptimizable ", dump_file);
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@ -1,3 +1,7 @@
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2014-09-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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* gcc.target/powerpc/swaps-p8-16.c: New test.
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2014-09-07 Richard Sandiford <rdsandiford@googlemail.com>
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* gcc.target/i386/pr62208.c: New test.
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56
gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c
Normal file
56
gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c
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@ -0,0 +1,56 @@
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/* { dg-do compile { target { powerpc64le-*-* } } } */
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/* { dg-options "-mcpu=power8 -O3" } */
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/* { dg-final { scan-assembler "lxvd2x" } } */
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/* { dg-final { scan-assembler "stxvd2x" } } */
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/* { dg-final { scan-assembler "vspltw" } } */
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/* { dg-final { scan-assembler-not "xxpermdi" } } */
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#include <altivec.h>
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void abort();
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typedef struct xx {vector double l; vector double h;} xx;
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#define N 4096
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#define M 10000000
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vector float ca[N][4] = {0};
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vector float cb[N][4] = {0};
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vector float cc[N][4] = {0};
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__attribute__((noinline)) void foo ()
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{
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int i;
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vector float brow;
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for (i = 0; i < N; i++) {
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brow = cb[i][0];
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cc[i][0] = vec_mul(vec_splats(brow[0]), ca[i][0]);
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cc[i][0] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]);
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cc[i][0] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]);
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cc[i][0] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]);
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brow = cb[i][1];
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cc[i][1] = vec_mul(vec_splats(brow[0]), ca[i][0]);
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cc[i][1] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]);
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cc[i][1] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]);
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cc[i][1] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]);
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brow = cb[i][2];
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cc[i][2] = vec_mul(vec_splats(brow[0]), ca[i][0]);
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cc[i][2] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]);
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cc[i][2] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]);
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cc[i][2] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]);
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brow = cb[i][3];
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cc[i][3] = vec_mul(vec_splats(brow[0]), ca[i][0]);
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cc[i][3] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]);
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cc[i][3] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]);
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cc[i][3] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]);
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}
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}
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int main ()
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{
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foo ();
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return 0;
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}
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