re PR target/54680 ([SH] Unnecessary int-float-int conversion of fsca fixed point input)
PR target/54680 * config/sh/sh.c (sh_fsca_sf2int, sh_fsca_int2sf): Fix swapped comments. * config/sh/predicates.md (fpul_operand): Add comment. (fpul_fsca_operand, fsca_scale_factor): New predicates. * config/sh/sh.md (fsca): Move below sincossf3 expander. Convert to insn_and_split. Use fpul_fsca_operand and fsca_scale_factor predicates. Simplify fpul operand in splitter. PR target/54680 * gcc.target/sh/pr54680.c: New. From-SVN: r192416
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Oleg Endo
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535269f4f9
commit
db292b0ecd
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@ -1,3 +1,14 @@
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2012-10-12 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/54680
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* config/sh/sh.c (sh_fsca_sf2int, sh_fsca_int2sf): Fix swapped
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comments.
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* config/sh/predicates.md (fpul_operand): Add comment.
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(fpul_fsca_operand, fsca_scale_factor): New predicates.
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* config/sh/sh.md (fsca): Move below sincossf3 expander. Convert to
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insn_and_split. Use fpul_fsca_operand and fsca_scale_factor predicates.
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Simplify fpul operand in splitter.
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2012-10-12 Jan Hubicka <jh@suse.cz>
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* tree-ssa-threadupdate.c (def_split_header_continue_p): Do not
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@ -345,8 +345,10 @@
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&& GET_MODE (op) == PSImode);
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})
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;; TODO: Add a comment here.
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;; Returns true if OP is an operand that is either the fpul hard reg or
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;; a pseudo. This prevents combine from propagating function arguments
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;; in hard regs into insns that need the operand in fpul. If it's a pseudo
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;; reload can fix it up.
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(define_predicate "fpul_operand"
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(match_code "reg")
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{
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@ -358,6 +360,29 @@
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&& GET_MODE (op) == mode);
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})
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;; Returns true if OP is a valid fpul input operand for the fsca insn.
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;; The value in fpul is a fixed-point value and its scaling is described
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;; in the fsca insn by a mult:SF. To allow pre-scaled fixed-point inputs
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;; in fpul we have to permit things like
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;; (reg:SI)
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;; (fix:SF (float:SF (reg:SI)))
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(define_predicate "fpul_fsca_operand"
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(match_code "fix,reg")
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{
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if (fpul_operand (op, SImode))
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return true;
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if (GET_CODE (op) == FIX && GET_MODE (op) == SImode
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&& GET_CODE (XEXP (op, 0)) == FLOAT && GET_MODE (XEXP (op, 0)) == SFmode)
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return fpul_fsca_operand (XEXP (XEXP (op, 0), 0),
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GET_MODE (XEXP (XEXP (op, 0), 0)));
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return false;
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})
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;; Returns true if OP is a valid constant scale factor for the fsca insn.
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(define_predicate "fsca_scale_factor"
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(and (match_code "const_double")
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(match_test "op == sh_fsca_int2sf ()")))
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;; TODO: Add a comment here.
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(define_predicate "general_extend_operand"
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@ -12659,11 +12659,9 @@ check_use_sfunc_addr (rtx insn, rtx reg)
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gcc_unreachable ();
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}
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/* This function returns a constant rtx that represents pi / 2**15 in
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SFmode. it's used to scale SFmode angles, in radians, to a
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fixed-point signed 16.16-bit fraction of a full circle, i.e., 2*pi
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maps to 0x10000). */
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/* This function returns a constant rtx that represents 2**15 / pi in
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SFmode. It's used to scale a fixed-point signed 16.16-bit fraction
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of a full circle back to an SFmode value, i.e. 0x10000 maps to 2*pi. */
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static GTY(()) rtx sh_fsca_sf2int_rtx;
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rtx
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@ -12680,11 +12678,10 @@ sh_fsca_sf2int (void)
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return sh_fsca_sf2int_rtx;
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}
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/* This function returns a constant rtx that represents 2**15 / pi in
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SFmode. it's used to scale a fixed-point signed 16.16-bit fraction
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of a full circle back to a SFmode value, i.e., 0x10000 maps to
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2*pi). */
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/* This function returns a constant rtx that represents pi / 2**15 in
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SFmode. It's used to scale SFmode angles, in radians, to a
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fixed-point signed 16.16-bit fraction of a full circle, i.e. 2*pi
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maps to 0x10000. */
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static GTY(()) rtx sh_fsca_int2sf_rtx;
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rtx
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@ -12208,22 +12208,6 @@ label:
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[(set_attr "type" "fsrra")
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(set_attr "fp_mode" "single")])
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(define_insn "fsca"
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[(set (match_operand:V2SF 0 "fp_arith_reg_operand" "=f")
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(vec_concat:V2SF
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(unspec:SF [(mult:SF
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(float:SF (match_operand:SI 1 "fpul_operand" "y"))
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(match_operand:SF 2 "immediate_operand" "i"))
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] UNSPEC_FSINA)
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(unspec:SF [(mult:SF (float:SF (match_dup 1)) (match_dup 2))
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] UNSPEC_FCOSA)))
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(use (match_operand:PSI 3 "fpscr_operand" "c"))]
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"TARGET_FPU_ANY && TARGET_FSCA
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&& operands[2] == sh_fsca_int2sf ()"
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"fsca fpul,%d0"
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[(set_attr "type" "fsca")
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(set_attr "fp_mode" "single")])
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;; When the sincos pattern is defined, the builtin functions sin and cos
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;; will be expanded to the sincos pattern and one of the output values will
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;; remain unused.
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@ -12250,6 +12234,38 @@ label:
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DONE;
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})
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(define_insn_and_split "fsca"
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[(set (match_operand:V2SF 0 "fp_arith_reg_operand" "=f")
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(vec_concat:V2SF
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(unspec:SF [(mult:SF
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(float:SF (match_operand:SI 1 "fpul_fsca_operand" "y"))
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(match_operand:SF 2 "fsca_scale_factor" "i"))
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] UNSPEC_FSINA)
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(unspec:SF [(mult:SF (float:SF (match_dup 1)) (match_dup 2))
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] UNSPEC_FCOSA)))
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(use (match_operand:PSI 3 "fpscr_operand" "c"))]
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"TARGET_FPU_ANY && TARGET_FSCA"
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"fsca fpul,%d0"
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"&& !fpul_operand (operands[1], SImode)"
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[(const_int 0)]
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{
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/* If operands[1] is something like (fix:SF (float:SF (reg:SI))) reduce it
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to a simple reg, otherwise reload will have trouble reloading the
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pseudo into fpul. */
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rtx x = XEXP (operands[1], 0);
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while (x != NULL_RTX && !fpul_operand (x, SImode))
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{
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gcc_assert (GET_CODE (x) == FIX || GET_CODE (x) == FLOAT);
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x = XEXP (x, 0);
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}
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gcc_assert (x != NULL_RTX && fpul_operand (x, SImode));
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emit_insn (gen_fsca (operands[0], x, operands[2], operands[3]));
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DONE;
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}
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[(set_attr "type" "fsca")
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(set_attr "fp_mode" "single")])
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(define_expand "abssf2"
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[(set (match_operand:SF 0 "fp_arith_reg_operand" "")
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(abs:SF (match_operand:SF 1 "fp_arith_reg_operand" "")))]
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@ -1,3 +1,8 @@
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2012-10-12 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/54680
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* gcc.target/sh/pr54680.c: New.
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2012-10-12 Jan Hubicka <jh@suse.cz>
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* gcc.dg/webizer.c: New testcase.
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@ -0,0 +1,66 @@
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/* Verify that the fsca input value is not converted to float and then back
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to int. Notice that we can't count just "lds" insns because mode switches
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use "lds.l". */
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/* { dg-do compile { target "sh*-*-*" } } */
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/* { dg-options "-O2 -mfsca -funsafe-math-optimizations" } */
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/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2*" "-m3*" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */
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/* { dg-final { scan-assembler-times "fsca" 7 } } */
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/* { dg-final { scan-assembler-times "shad" 1 } } */
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/* { dg-final { scan-assembler-times "lds\t" 6 } } */
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/* { dg-final { scan-assembler-times "fmul" 2 } } */
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/* { dg-final { scan-assembler-times "ftrc" 1 } } */
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#include <math.h>
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static const float pi = 3.14159265359f;
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float
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test00 (int x)
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{
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/* 1x shad, 1x lds, 1x fsca */
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return sinf ( (x >> 8) * (2*pi) / (1 << 16));
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}
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float
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test01 (int x)
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{
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/* 1x lds, 1x fsca */
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return sinf (x * (2*pi) / 65536);
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}
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float
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test02 (int x)
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{
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/* 1x lds, 1x fsca */
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return sinf (x * (2*pi / 65536));
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}
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float
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test03 (int x)
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{
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/* 1x lds, 1x fsca */
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float scale = 2*pi / 65536;
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return sinf (x * scale);
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}
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float
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test04 (int x)
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{
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/* 1x lds, 1x fsca */
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return cosf (x / 65536.0f * 2*pi);
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}
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float
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test05 (int x)
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{
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/* 1x lds, 1x fsca, 1x fmul */
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float scale = 2*pi / 65536;
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return sinf (x * scale) * cosf (x * scale);
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}
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float
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test_06 (float x)
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{
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/* 1x fmul, 1x ftrc, 1x fsca */
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return sinf (x);
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}
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