spe.md (spe_fix_truncsfsi2): Delete.

2004-02-24  Aldy Hernandez  <aldyh@redhat.com>

        * config/rs6000/spe.md (spe_fix_truncsfsi2): Delete.
        (spe_fixuns_truncsfsi2): Delete.

        * config/rs6000/rs6000.md (fix_truncsfsi2): Delete.
        (fixuns_truncsfsi2): Delete.

From-SVN: r78396
This commit is contained in:
Aldy Hernandez 2004-02-24 22:59:03 +00:00 committed by Aldy Hernandez
parent 173cd57124
commit dba2921d52
3 changed files with 23 additions and 27 deletions

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@ -1,3 +1,11 @@
2004-02-24 Aldy Hernandez <aldyh@redhat.com>
* config/rs6000/spe.md (spe_fix_truncsfsi2): Delete.
(spe_fixuns_truncsfsi2): Delete.
* config/rs6000/rs6000.md (fix_truncsfsi2): Delete.
(fixuns_truncsfsi2): Delete.
2004-02-24 Josef Zlomek <zlomekj@suse.cz>
PR/14240

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@ -4959,20 +4959,6 @@
"fsel %0,%1,%2,%3"
[(set_attr "type" "fp")])
;; Conversions to and from floating-point.
(define_expand "fixuns_truncsfsi2"
[(set (match_operand:SI 0 "gpc_reg_operand" "")
(unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "")))]
"TARGET_HARD_FLOAT && !TARGET_FPRS"
"")
(define_expand "fix_truncsfsi2"
[(set (match_operand:SI 0 "gpc_reg_operand" "")
(fix:SI (match_operand:SF 1 "gpc_reg_operand" "")))]
"TARGET_HARD_FLOAT && !TARGET_FPRS"
"")
; For each of these conversions, there is a define_expand, a define_insn
; with a '#' template, and a define_split (with C code). The idea is
; to allow constant folding with the template of the define_insn,

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@ -83,19 +83,21 @@
"efsctuiz %0,%1"
[(set_attr "type" "fp")])
(define_insn "spe_fixuns_truncsfsi2"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
"TARGET_HARD_FLOAT && !TARGET_FPRS"
"efsctui %0,%1"
[(set_attr "type" "fp")])
(define_insn "spe_fix_truncsfsi2"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
"TARGET_HARD_FLOAT && !TARGET_FPRS"
"efsctsi %0,%1"
[(set_attr "type" "fp")])
; These instructions aren't IEEE compliant. They get some corner cases
; wrong. Don't enable them!
;(define_insn "spe_fixuns_truncsfsi2"
; [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
; (unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
; "TARGET_HARD_FLOAT && !TARGET_FPRS"
; "efsctui %0,%1"
; [(set_attr "type" "fp")])
;
;(define_insn "spe_fix_truncsfsi2"
; [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
; (fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
; "TARGET_HARD_FLOAT && !TARGET_FPRS"
; "efsctsi %0,%1"
; [(set_attr "type" "fp")])
(define_insn "spe_floatunssisf2"
[(set (match_operand:SF 0 "gpc_reg_operand" "=r")