spe.md (spe_fix_truncsfsi2): Delete.
2004-02-24 Aldy Hernandez <aldyh@redhat.com> * config/rs6000/spe.md (spe_fix_truncsfsi2): Delete. (spe_fixuns_truncsfsi2): Delete. * config/rs6000/rs6000.md (fix_truncsfsi2): Delete. (fixuns_truncsfsi2): Delete. From-SVN: r78396
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@ -1,3 +1,11 @@
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2004-02-24 Aldy Hernandez <aldyh@redhat.com>
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* config/rs6000/spe.md (spe_fix_truncsfsi2): Delete.
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(spe_fixuns_truncsfsi2): Delete.
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* config/rs6000/rs6000.md (fix_truncsfsi2): Delete.
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(fixuns_truncsfsi2): Delete.
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2004-02-24 Josef Zlomek <zlomekj@suse.cz>
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2004-02-24 Josef Zlomek <zlomekj@suse.cz>
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PR/14240
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PR/14240
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@ -4959,20 +4959,6 @@
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"fsel %0,%1,%2,%3"
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"fsel %0,%1,%2,%3"
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[(set_attr "type" "fp")])
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[(set_attr "type" "fp")])
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;; Conversions to and from floating-point.
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(define_expand "fixuns_truncsfsi2"
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[(set (match_operand:SI 0 "gpc_reg_operand" "")
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(unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "")))]
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"TARGET_HARD_FLOAT && !TARGET_FPRS"
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"")
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(define_expand "fix_truncsfsi2"
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[(set (match_operand:SI 0 "gpc_reg_operand" "")
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(fix:SI (match_operand:SF 1 "gpc_reg_operand" "")))]
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"TARGET_HARD_FLOAT && !TARGET_FPRS"
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"")
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; For each of these conversions, there is a define_expand, a define_insn
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; For each of these conversions, there is a define_expand, a define_insn
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; with a '#' template, and a define_split (with C code). The idea is
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; with a '#' template, and a define_split (with C code). The idea is
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; to allow constant folding with the template of the define_insn,
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; to allow constant folding with the template of the define_insn,
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@ -83,19 +83,21 @@
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"efsctuiz %0,%1"
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"efsctuiz %0,%1"
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[(set_attr "type" "fp")])
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[(set_attr "type" "fp")])
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(define_insn "spe_fixuns_truncsfsi2"
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; These instructions aren't IEEE compliant. They get some corner cases
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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; wrong. Don't enable them!
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(unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
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;(define_insn "spe_fixuns_truncsfsi2"
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"TARGET_HARD_FLOAT && !TARGET_FPRS"
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; [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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"efsctui %0,%1"
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; (unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
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[(set_attr "type" "fp")])
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; "TARGET_HARD_FLOAT && !TARGET_FPRS"
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; "efsctui %0,%1"
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(define_insn "spe_fix_truncsfsi2"
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; [(set_attr "type" "fp")])
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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;
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(fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
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;(define_insn "spe_fix_truncsfsi2"
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"TARGET_HARD_FLOAT && !TARGET_FPRS"
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; [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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"efsctsi %0,%1"
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; (fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
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[(set_attr "type" "fp")])
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; "TARGET_HARD_FLOAT && !TARGET_FPRS"
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; "efsctsi %0,%1"
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; [(set_attr "type" "fp")])
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(define_insn "spe_floatunssisf2"
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(define_insn "spe_floatunssisf2"
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[(set (match_operand:SF 0 "gpc_reg_operand" "=r")
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[(set (match_operand:SF 0 "gpc_reg_operand" "=r")
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