rs6000.c (rs6000_emit_prologue): Do not place a RTX_FRAME_RELATED_P marker on the UNSPEC_MOVESI_FROM_CR insn.
ChangeLog:
2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
* config/rs6000/rs6000.c (rs6000_emit_prologue): Do not place a
RTX_FRAME_RELATED_P marker on the UNSPEC_MOVESI_FROM_CR insn.
Instead, add USEs of all modified call-saved CR fields to the
insn storing the result to the stack slot, and provide an
appropriate REG_FRAME_RELATED_EXPR for that insn.
* config/rs6000/rs6000.md ("*crsave"): New insn pattern.
* config/rs6000/predicates.md ("crsave_operation"): New predicate.
testsuite/ChangeLog:
2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
* g++.dg/eh/ppc64-sighandle-cr.C: New test.
From-SVN: r204799
This commit is contained in:
Ulrich Weigand
Ulrich Weigand
parent
2e4ceca56c
commit
dc2faee140
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@ -1,3 +1,13 @@
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2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
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* config/rs6000/rs6000.c (rs6000_emit_prologue): Do not place a
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RTX_FRAME_RELATED_P marker on the UNSPEC_MOVESI_FROM_CR insn.
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Instead, add USEs of all modified call-saved CR fields to the
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insn storing the result to the stack slot, and provide an
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appropriate REG_FRAME_RELATED_EXPR for that insn.
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* config/rs6000/rs6000.md ("*crsave"): New insn pattern.
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* config/rs6000/predicates.md ("crsave_operation"): New predicate.
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2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
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Alan Modra <amodra@gmail.com>
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@ -1538,6 +1538,26 @@
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return 1;
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})
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;; Return 1 if OP is valid for crsave insn, known to be a PARALLEL.
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(define_predicate "crsave_operation"
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(match_code "parallel")
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{
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int count = XVECLEN (op, 0);
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int i;
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for (i = 1; i < count; i++)
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{
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rtx exp = XVECEXP (op, 0, i);
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if (GET_CODE (exp) != USE
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|| GET_CODE (XEXP (exp, 0)) != REG
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|| GET_MODE (XEXP (exp, 0)) != CCmode
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|| ! CR_REGNO_P (REGNO (XEXP (exp, 0))))
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return 0;
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}
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return 1;
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})
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;; Return 1 if OP is valid for lmw insn, known to be a PARALLEL.
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(define_predicate "lmw_operation"
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(match_code "parallel")
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@ -21766,21 +21766,9 @@ rs6000_emit_prologue (void)
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&& REGNO (frame_reg_rtx) != cr_save_regno
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&& !(using_static_chain_p && cr_save_regno == 11))
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{
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rtx set;
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cr_save_rtx = gen_rtx_REG (SImode, cr_save_regno);
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START_USE (cr_save_regno);
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insn = emit_insn (gen_movesi_from_cr (cr_save_rtx));
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RTX_FRAME_RELATED_P (insn) = 1;
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/* Now, there's no way that dwarf2out_frame_debug_expr is going
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to understand '(unspec:SI [(reg:CC 68) ...] UNSPEC_MOVESI_FROM_CR)'.
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But that's OK. All we have to do is specify that _one_ condition
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code register is saved in this stack slot. The thrower's epilogue
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will then restore all the call-saved registers.
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We use CR2_REGNO (70) to be compatible with gcc-2.95 on Linux. */
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set = gen_rtx_SET (VOIDmode, cr_save_rtx,
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gen_rtx_REG (SImode, CR2_REGNO));
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add_reg_note (insn, REG_FRAME_RELATED_EXPR, set);
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emit_insn (gen_movesi_from_cr (cr_save_rtx));
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}
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/* Do any required saving of fpr's. If only one or two to save, do
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@ -22091,26 +22079,62 @@ rs6000_emit_prologue (void)
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rtx addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
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GEN_INT (info->cr_save_offset + frame_off));
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rtx mem = gen_frame_mem (SImode, addr);
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/* See the large comment above about why CR2_REGNO is used. */
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rtx magic_eh_cr_reg = gen_rtx_REG (SImode, CR2_REGNO);
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/* If we didn't copy cr before, do so now using r0. */
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if (cr_save_rtx == NULL_RTX)
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{
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rtx set;
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START_USE (0);
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cr_save_rtx = gen_rtx_REG (SImode, 0);
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insn = emit_insn (gen_movesi_from_cr (cr_save_rtx));
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RTX_FRAME_RELATED_P (insn) = 1;
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set = gen_rtx_SET (VOIDmode, cr_save_rtx, magic_eh_cr_reg);
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add_reg_note (insn, REG_FRAME_RELATED_EXPR, set);
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emit_insn (gen_movesi_from_cr (cr_save_rtx));
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}
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insn = emit_move_insn (mem, cr_save_rtx);
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/* Saving CR requires a two-instruction sequence: one instruction
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to move the CR to a general-purpose register, and a second
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instruction that stores the GPR to memory.
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We do not emit any DWARF CFI records for the first of these,
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because we cannot properly represent the fact that CR is saved in
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a register. One reason is that we cannot express that multiple
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CR fields are saved; another reason is that on 64-bit, the size
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of the CR register in DWARF (4 bytes) differs from the size of
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a general-purpose register.
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This means if any intervening instruction were to clobber one of
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the call-saved CR fields, we'd have incorrect CFI. To prevent
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this from happening, we mark the store to memory as a use of
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those CR fields, which prevents any such instruction from being
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scheduled in between the two instructions. */
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rtx crsave_v[9];
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int n_crsave = 0;
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int i;
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crsave_v[n_crsave++] = gen_rtx_SET (VOIDmode, mem, cr_save_rtx);
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for (i = 0; i < 8; i++)
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if (save_reg_p (CR0_REGNO + i))
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crsave_v[n_crsave++]
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= gen_rtx_USE (VOIDmode, gen_rtx_REG (CCmode, CR0_REGNO + i));
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insn = emit_insn (gen_rtx_PARALLEL (VOIDmode,
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gen_rtvec_v (n_crsave, crsave_v)));
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END_USE (REGNO (cr_save_rtx));
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rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
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NULL_RTX, NULL_RTX);
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/* Now, there's no way that dwarf2out_frame_debug_expr is going to
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understand '(unspec:SI [(reg:CC 68) ...] UNSPEC_MOVESI_FROM_CR)',
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so we need to construct a frame expression manually. */
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RTX_FRAME_RELATED_P (insn) = 1;
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/* Update address to be stack-pointer relative, like
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rs6000_frame_related would do. */
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addr = gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM),
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GEN_INT (info->cr_save_offset + sp_off));
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mem = gen_frame_mem (SImode, addr);
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/* We still cannot express that multiple CR fields are saved in the
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CR save slot. By convention, we use a single CR regnum to represent
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the fact that all call-saved CR fields are saved. We use CR2_REGNO
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to be compatible with gcc-2.95 on Linux. */
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rtx set = gen_rtx_SET (VOIDmode, mem, gen_rtx_REG (SImode, CR2_REGNO));
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add_reg_note (insn, REG_FRAME_RELATED_EXPR, set);
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}
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/* Update stack and set back pointer unless this is V.4,
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@ -15035,6 +15035,14 @@
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"mfcr %0"
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[(set_attr "type" "mfcr")])
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(define_insn "*crsave"
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[(match_parallel 0 "crsave_operation"
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[(set (match_operand:SI 1 "memory_operand" "=m")
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(match_operand:SI 2 "gpc_reg_operand" "r"))])]
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""
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"stw %2,%1"
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[(set_attr "type" "store")])
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(define_insn "*stmw"
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[(match_parallel 0 "stmw_operation"
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[(set (match_operand:SI 1 "memory_operand" "=m")
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@ -1,3 +1,7 @@
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2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
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* g++.dg/eh/ppc64-sighandle-cr.C: New test.
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2013-11-14 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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* gcc.dg/torture/float128-cmp-invalid.c: Require fenv_exceptions.
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