[SPARC] Errata workaround for GRLIB-TN-0013
This patch provides a workaround for the errata described in GRLIB-TN-0013. If the workaround is enabled it will: * Prevent div and sqrt instructions in the delay slot. * Insert NOPs to prevent the sequence (div/sqrt) -> (two or three floating point operations or loads) -> (div/sqrt). * Not insert NOPs if any of the floating point operations have a dependency on the destination register of the first (div/sqrt). * Not insert NOPs if one of the floating point operations is a (div/sqrt). * Insert NOPs to prevent (div/sqrt) followed by a branch. It is applicable to GR712RC, UT700, and UT699. Backport from mainline 2017-11-29 Daniel Cederman <cederman@gaisler.com> gcc/ * config/sparc/sparc.c (fpop_reg_depend_p): New function. (div_sqrt_insn_p): New function. (sparc_do_work_around_errata): Insert NOP instructions to prevent sequences that could trigger the TN-0013 errata for certain LEON3 processors. (pass_work_around_errata::gate): Also test sparc_fix_lost_divsqrt. (sparc_option_override): Set sparc_fix_lost_divsqrt appropriately. * config/sparc/sparc.md (fix_lost_divsqrt): New attribute. (in_branch_delay): Prevent div and sqrt in delay slot if fix_lost_divsqrt. * config/sparc/sparc.opt (sparc_fix_lost_divsqrt): New variable. From-SVN: r255243
This commit is contained in:
Daniel Cederman
Daniel Hellstrom
parent
304d27a099
commit
dc363a5558
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@ -1,5 +1,21 @@
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2017-11-29 Daniel Cederman <cederman@gaisler.com>
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Backport from mainline
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* config/sparc/sparc.c (fpop_reg_depend_p): New function.
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(div_sqrt_insn_p): New function.
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(sparc_do_work_around_errata): Insert NOP instructions to
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prevent sequences that could trigger the TN-0013 errata for
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certain LEON3 processors.
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(pass_work_around_errata::gate): Also test sparc_fix_lost_divsqrt.
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(sparc_option_override): Set sparc_fix_lost_divsqrt appropriately.
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* config/sparc/sparc.md (fix_lost_divsqrt): New attribute.
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(in_branch_delay): Prevent div and sqrt in delay slot if
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fix_lost_divsqrt.
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* config/sparc/sparc.opt (sparc_fix_lost_divsqrt): New variable.
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2017-11-29 Daniel Cederman <cederman@gaisler.com>
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Backport from mainline
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* config/sparc/sparc.c (atomic_insn_p): New function.
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(sparc_do_work_around_errata): Insert NOP instructions to
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prevent sequences that could trigger the TN-0010 errata for
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@ -914,6 +914,39 @@ mem_ref (rtx x)
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return NULL_RTX;
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}
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/* True if any of INSN's source register(s) is REG. */
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static bool
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insn_uses_reg_p (rtx_insn *insn, unsigned int reg)
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{
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extract_insn (insn);
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return ((REG_P (recog_data.operand[1])
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&& REGNO (recog_data.operand[1]) == reg)
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|| (recog_data.n_operands == 3
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&& REG_P (recog_data.operand[2])
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&& REGNO (recog_data.operand[2]) == reg));
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}
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/* True if INSN is a floating-point division or square-root. */
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static bool
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div_sqrt_insn_p (rtx_insn *insn)
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{
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if (GET_CODE (PATTERN (insn)) != SET)
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return false;
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switch (get_attr_type (insn))
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{
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case TYPE_FPDIVS:
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case TYPE_FPSQRTS:
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case TYPE_FPDIVD:
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case TYPE_FPSQRTD:
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return true;
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default:
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return false;
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}
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}
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/* True if INSN is a floating-point instruction. */
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static bool
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@ -1034,6 +1067,79 @@ sparc_do_work_around_errata (void)
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insert_nop = true;
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}
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/* Look for sequences that could trigger the GRLIB-TN-0013 errata. */
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if (sparc_fix_lost_divsqrt
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&& NONJUMP_INSN_P (insn)
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&& div_sqrt_insn_p (insn))
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{
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int i;
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int fp_found = 0;
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rtx_insn *after;
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const unsigned int dest_reg = REGNO (SET_DEST (single_set (insn)));
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next = next_active_insn (insn);
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if (!next)
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break;
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for (after = next, i = 0; i < 4; i++)
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{
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/* Count floating-point operations. */
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if (i != 3 && fpop_insn_p (after))
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{
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/* If the insn uses the destination register of
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the div/sqrt, then it cannot be problematic. */
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if (insn_uses_reg_p (after, dest_reg))
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break;
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fp_found++;
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}
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/* Count floating-point loads. */
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if (i != 3
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&& (set = single_set (after)) != NULL_RTX
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&& REG_P (SET_DEST (set))
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&& REGNO (SET_DEST (set)) > 31)
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{
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/* If the insn uses the destination register of
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the div/sqrt, then it cannot be problematic. */
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if (REGNO (SET_DEST (set)) == dest_reg)
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break;
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fp_found++;
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}
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/* Check if this is a problematic sequence. */
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if (i > 1
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&& fp_found >= 2
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&& div_sqrt_insn_p (after))
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{
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/* If this is the short version of the problematic
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sequence we add two NOPs in a row to also prevent
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the long version. */
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if (i == 2)
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emit_insn_before (gen_nop (), next);
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insert_nop = true;
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break;
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}
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/* No need to scan past a second div/sqrt. */
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if (div_sqrt_insn_p (after))
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break;
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/* Insert NOP before branch. */
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if (i < 3
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&& (!NONJUMP_INSN_P (after)
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|| GET_CODE (PATTERN (after)) == SEQUENCE))
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{
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insert_nop = true;
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break;
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}
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after = next_active_insn (after);
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if (!after)
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break;
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}
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}
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/* Look for either of these two sequences:
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Sequence A:
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@ -1362,7 +1468,7 @@ public:
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virtual bool gate (function *)
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{
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return sparc_fix_at697f || sparc_fix_ut699 || sparc_fix_b2bst
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|| sparc_fix_gr712rc || sparc_fix_ut700;
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|| sparc_fix_gr712rc || sparc_fix_ut700 || sparc_fix_lost_divsqrt;
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}
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virtual unsigned int execute (function *)
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@ -1732,9 +1838,12 @@ sparc_option_override (void)
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if (!(target_flags_explicit & MASK_LRA))
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target_flags |= MASK_LRA;
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/* Enable the back-to-back store errata workaround for LEON3FT. */
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/* Enable applicable errata workarounds for LEON3FT. */
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if (sparc_fix_ut699 || sparc_fix_ut700 || sparc_fix_gr712rc)
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{
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sparc_fix_b2bst = 1;
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sparc_fix_lost_divsqrt = 1;
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}
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/* Disable FsMULd for the UT699 since it doesn't work correctly. */
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if (sparc_fix_ut699)
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@ -430,6 +430,10 @@
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(symbol_ref "(sparc_fix_b2bst != 0
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? FIX_B2BST_TRUE : FIX_B2BST_FALSE)"))
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(define_attr "fix_lost_divsqrt" "false,true"
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(symbol_ref "(sparc_fix_lost_divsqrt != 0
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? FIX_LOST_DIVSQRT_TRUE : FIX_LOST_DIVSQRT_FALSE)"))
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(define_attr "fix_gr712rc" "false,true"
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(symbol_ref "(sparc_fix_gr712rc != 0
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? FIX_GR712RC_TRUE : FIX_GR712RC_FALSE)"))
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@ -581,6 +585,9 @@
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(define_attr "in_branch_delay" "false,true"
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(cond [(eq_attr "type" "uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")
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(const_string "false")
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(and (eq_attr "fix_lost_divsqrt" "true")
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(eq_attr "type" "fpdivs,fpsqrts,fpdivd,fpsqrtd"))
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(const_string "false")
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(and (eq_attr "fix_b2bst" "true") (eq_attr "type" "store,fpstore"))
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(const_string "false")
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(and (eq_attr "fix_ut699" "true") (eq_attr "type" "load,sload"))
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@ -253,6 +253,10 @@ Enable workarounds for the errata of the GR712RC processor.
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TargetVariable
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unsigned int sparc_fix_b2bst
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;; Enable workaround for GRLIB-TN-0013 errata
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TargetVariable
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unsigned int sparc_fix_lost_divsqrt
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Mask(LONG_DOUBLE_128)
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;; Use 128-bit long double
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