altivec-17.c: New test.
2004-08-16 Janis Johnson <janis187@us.ibm.com> * gcc.dg/altivec-17.c: New test. * gcc.dg/altivec-18.c: New test. From-SVN: r86067
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2004-08-16 Janis Johnson <janis187@us.ibm.com>
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* gcc.dg/altivec-17.c: New test.
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* gcc.dg/altivec-18.c: New test.
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2004-08-16 Kriang Lerdsuwanakij <lerdsuwa@users.sourceforge.net>
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2004-08-16 Kriang Lerdsuwanakij <lerdsuwa@users.sourceforge.net>
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PR c++/6749
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PR c++/6749
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gcc/testsuite/gcc.dg/altivec-17.c
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/* Verify a statement in the GCC Manual that GCC allows the use of a
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typedef name as a vector type specifier. */
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/* { dg-do compile { target powerpc*-*-* } } */
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/* { dg-xfail-if "" { "powerpc-ibm-aix*" } { "-maltivec" } { "" } } */
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/* { dg-options "-maltivec -mabi=altivec" } */
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typedef unsigned int ui;
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typedef signed char sc;
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__vector ui vui;
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__vector sc vsc;
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gcc/testsuite/gcc.dg/altivec-18.c
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/* { dg-do compile { target powerpc*-*-* } } */
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/* { dg-xfail-if "" { "powerpc-ibm-aix*" } { "-maltivec" } { "" } } */
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/* { dg-options "-maltivec -mabi=altivec" } */
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/* { dg-final { scan-assembler "vcmpgtub" } } */
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/* { dg-final { scan-assembler "vcmpgtsh" } } */
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/* { dg-final { scan-assembler "vcmpgtsw" } } */
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/* Verify a statement in the GCC Manual that vector type specifiers can
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omit "signed" or "unsigned", with the default being "signed" for int
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and short, and "unsigned" for char. */
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#include <altivec.h>
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extern vector char vc1, vc2;
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extern vector short vs1, vs2;
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extern vector int vi1, vi2;
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int signedness (void)
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{
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return vec_all_le (vc1, vc2)
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&& vec_all_le (vs1, vs2)
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&& vec_all_le (vi1, vi2);
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}
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