re PR target/19010 (sse and mmx parameter passing broken)
PR target/19010
* config/i386/i386.c (ix86_must_pass_in_stack): Don't return true
for TImode vectors.
(gen_reg_or_parallel): New.
(function_arg): Use it.
(ix86_hard_regno_mode_ok): Test SSE1 and SSE2 separately,
MMX and 3DNOW separately.
(ix86_rtx_costs): Simplify FLOAT_EXTEND case.
(ix86_vector_mode_supported_p): Test SSE1 and SSE2 separately.
* config/i386/i386.h (VALID_SSE2_REG_MODE): Move SSE2 cases from ...
(VALID_SSE_REG_MODE): ... here.
* gcc.target/i386/i386.exp: New harness.
* gcc.target/i386/vect-args.c: New.
From-SVN: r92205
This commit is contained in:
Richard Henderson
Richard Henderson
parent
4586c5575b
commit
dcbca208a3
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@ -1,3 +1,17 @@
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2004-12-15 Richard Henderson <rth@redhat.com>
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PR target/19010
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* config/i386/i386.c (ix86_must_pass_in_stack): Don't return true
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for TImode vectors.
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(gen_reg_or_parallel): New.
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(function_arg): Use it.
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(ix86_hard_regno_mode_ok): Test SSE1 and SSE2 separately,
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MMX and 3DNOW separately.
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(ix86_rtx_costs): Simplify FLOAT_EXTEND case.
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(ix86_vector_mode_supported_p): Test SSE1 and SSE2 separately.
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* config/i386/i386.h (VALID_SSE2_REG_MODE): Move SSE2 cases from ...
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(VALID_SSE_REG_MODE): ... here.
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2004-12-15 David Edelsohn <edelsohn@gnu.org>
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* xcoffout.c (xcoffout_declare_function): Change strncpy to memcpy.
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@ -1943,7 +1943,12 @@ ix86_must_pass_in_stack (enum machine_mode mode, tree type)
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{
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if (must_pass_in_stack_var_size_or_pad (mode, type))
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return true;
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return (!TARGET_64BIT && type && mode == TImode);
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/* For 32-bit, we want TImode aggregates to go on the stack. But watch out!
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The layout_type routine is crafty and tries to trick us into passing
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currently unsupported vector types on the stack by using TImode. */
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return (!TARGET_64BIT && mode == TImode
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&& type && TREE_CODE (type) != VECTOR_TYPE);
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}
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/* Initialize a variable CUM of type CUMULATIVE_ARGS
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@ -2640,6 +2645,34 @@ function_arg_advance (CUMULATIVE_ARGS *cum, /* current arg information */
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return;
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}
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/* A subroutine of function_arg. We want to pass a parameter whose nominal
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type is MODE in REGNO. We try to minimize ABI variation, so MODE may not
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actually be valid for REGNO with the current ISA. In this case, ALT_MODE
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is used instead. It must be the same size as MODE, and must be known to
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be valid for REGNO. Finally, ORIG_MODE is the original mode of the
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parameter, as seen by the type system. This may be different from MODE
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when we're mucking with things minimizing ABI variations.
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Returns a REG or a PARALLEL as appropriate. */
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static rtx
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gen_reg_or_parallel (enum machine_mode mode, enum machine_mode alt_mode,
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enum machine_mode orig_mode, unsigned int regno)
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{
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rtx tmp;
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if (HARD_REGNO_MODE_OK (regno, mode))
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tmp = gen_rtx_REG (mode, regno);
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else
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{
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tmp = gen_rtx_REG (alt_mode, regno);
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tmp = gen_rtx_EXPR_LIST (VOIDmode, tmp, const0_rtx);
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tmp = gen_rtx_PARALLEL (orig_mode, gen_rtvec (1, tmp));
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}
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return tmp;
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}
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/* Define where to put the arguments to a function.
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Value is zero to push the argument on the stack,
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or a hard register in which to store the argument.
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@ -2654,12 +2687,11 @@ function_arg_advance (CUMULATIVE_ARGS *cum, /* current arg information */
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(otherwise it is an extra parameter matching an ellipsis). */
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rtx
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function_arg (CUMULATIVE_ARGS *cum, /* current arg information */
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enum machine_mode mode, /* current arg mode */
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tree type, /* type of the argument or 0 if lib support */
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int named) /* != 0 for normal args, == 0 for ... args */
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function_arg (CUMULATIVE_ARGS *cum, enum machine_mode orig_mode,
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tree type, int named)
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{
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rtx ret = NULL_RTX;
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enum machine_mode mode = orig_mode;
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rtx ret = NULL_RTX;
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int bytes =
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(mode == BLKmode) ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode);
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int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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@ -2755,7 +2787,8 @@ function_arg (CUMULATIVE_ARGS *cum, /* current arg information */
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"changes the ABI");
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}
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if (cum->sse_nregs)
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ret = gen_rtx_REG (mode, cum->sse_regno + FIRST_SSE_REG);
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ret = gen_reg_or_parallel (mode, TImode, orig_mode,
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cum->sse_regno + FIRST_SSE_REG);
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}
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break;
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case V8QImode:
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@ -2771,7 +2804,8 @@ function_arg (CUMULATIVE_ARGS *cum, /* current arg information */
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"changes the ABI");
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}
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if (cum->mmx_nregs)
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ret = gen_rtx_REG (mode, cum->mmx_regno + FIRST_MMX_REG);
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ret = gen_reg_or_parallel (mode, DImode, orig_mode,
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cum->mmx_regno + FIRST_MMX_REG);
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}
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break;
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}
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@ -13991,10 +14025,20 @@ ix86_hard_regno_mode_ok (int regno, enum machine_mode mode)
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if (FP_REGNO_P (regno))
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return VALID_FP_MODE_P (mode);
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if (SSE_REGNO_P (regno))
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return (TARGET_SSE ? VALID_SSE_REG_MODE (mode) : 0);
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{
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if (TARGET_SSE2 && VALID_SSE2_REG_MODE (mode))
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return 1;
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if (TARGET_SSE && VALID_SSE_REG_MODE (mode))
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return 1;
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return 0;
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}
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if (MMX_REGNO_P (regno))
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return (TARGET_MMX
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? VALID_MMX_REG_MODE (mode) || VALID_MMX_REG_MODE_3DNOW (mode) : 0);
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{
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if (TARGET_3DNOW && VALID_MMX_REG_MODE_3DNOW (mode))
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return 1;
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if (TARGET_MMX && VALID_MMX_REG_MODE (mode))
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return 1;
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}
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/* We handle both integer and floats in the general purpose registers.
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In future we should be able to handle vector modes as well. */
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if (!VALID_INT_MODE_P (mode) && !VALID_FP_MODE_P (mode))
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@ -14372,7 +14416,9 @@ ix86_rtx_costs (rtx x, int code, int outer_code, int *total)
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return false;
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case FLOAT_EXTEND:
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if (!TARGET_SSE_MATH || !VALID_SSE_REG_MODE (mode))
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if (!TARGET_SSE_MATH
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|| mode == XFmode
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|| (mode == DFmode && !TARGET_SSE2))
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*total = 0;
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return false;
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@ -15164,20 +15210,15 @@ ix86_expand_vector_init (rtx target, rtx vals)
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static bool
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ix86_vector_mode_supported_p (enum machine_mode mode)
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{
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if (TARGET_SSE
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&& VALID_SSE_REG_MODE (mode))
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if (TARGET_SSE && VALID_SSE_REG_MODE (mode))
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return true;
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else if (TARGET_MMX
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&& VALID_MMX_REG_MODE (mode))
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if (TARGET_SSE2 && VALID_SSE2_REG_MODE (mode))
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return true;
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else if (TARGET_3DNOW
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&& VALID_MMX_REG_MODE_3DNOW (mode))
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if (TARGET_MMX && VALID_MMX_REG_MODE (mode))
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return true;
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else
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return false;
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if (TARGET_3DNOW && VALID_MMX_REG_MODE_3DNOW (mode))
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return true;
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return false;
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}
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/* Worker function for TARGET_MD_ASM_CLOBBERS.
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@ -1075,14 +1075,12 @@ do { \
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#define VALID_SSE2_REG_MODE(MODE) \
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((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \
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|| (MODE) == V2DImode)
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|| (MODE) == V2DImode || (MODE) == DFmode \
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|| VALID_MMX_REG_MODE (MODE))
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#define VALID_SSE_REG_MODE(MODE) \
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((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
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|| (MODE) == SFmode || (MODE) == TFmode \
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/* Always accept SSE2 modes so that xmmintrin.h compiles. */ \
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|| VALID_SSE2_REG_MODE (MODE) \
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|| (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE))))
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|| (MODE) == SFmode || (MODE) == TFmode)
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#define VALID_MMX_REG_MODE_3DNOW(MODE) \
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((MODE) == V2SFmode || (MODE) == SFmode)
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@ -1,3 +1,8 @@
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2004-12-15 Richard Henderson <rth@redhat.com>
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* gcc.target/i386/i386.exp: New harness.
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* gcc.target/i386/vect-args.c: New.
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2004-12-15 David Edelsohn <edelsohn@gnu.org>
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* gcc.dg/20040813-1.c: Skip for *-*-aix*.
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@ -0,0 +1,54 @@
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# Copyright (C) 1997, 2004 Free Software Foundation, Inc.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 2 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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# GCC testsuite that uses the `dg.exp' driver.
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# Exit immediately if this isn't a SPARC target.
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if { ![istarget i?86*-*-*] && ![istarget x86_64-*-*] } then {
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return
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}
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# Load support procs.
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load_lib gcc-dg.exp
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# If a testcase doesn't have special options, use these.
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global DEFAULT_CFLAGS
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if ![info exists DEFAULT_CFLAGS] then {
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set DEFAULT_CFLAGS " -ansi -pedantic-errors"
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}
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# Initialize `dg'.
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dg-init
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# Special case compilation of vect-args.c so we don't have to
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# replicate it 10 times.
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foreach type { "" -mmmx -m3dnow -msse -msse2 } {
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foreach level { "" -O } {
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set flags "$type $level"
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verbose -log "Testing vect-args, $flags" 1
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dg-test $srcdir/$subdir/vect-args.c $flags ""
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}
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}
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# Everything else.
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set tests [lsort [find $srcdir/$subdir *.\[cS\]]]
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set tests [prune $tests $srcdir/$subdir/vect-args.c]
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# Main loop.
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dg-runtest $tests "" $DEFAULT_CFLAGS
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# All done.
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dg-finish
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@ -0,0 +1,33 @@
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/* { dg-do compile } */
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/* { dg-options "-w" } */
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/* SSE1 and SSE2 modes. */
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typedef unsigned char V16QImode __attribute__((vector_size(16)));
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typedef unsigned short V8HImode __attribute__((vector_size(16)));
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typedef unsigned int V4SImode __attribute__((vector_size(16)));
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typedef unsigned long long V2DImode __attribute__((vector_size(16)));
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typedef float V4SFmode __attribute__((vector_size(16)));
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typedef double V2DFmode __attribute__((vector_size(16)));
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/* MMX and 3DNOW modes. */
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typedef unsigned char V8QImode __attribute__((vector_size(8)));
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typedef unsigned short V4HImode __attribute__((vector_size(8)));
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typedef unsigned int V2SImode __attribute__((vector_size(8)));
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typedef float V2SFmode __attribute__((vector_size(8)));
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/* Test argument loading and unloading of each. */
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#define TEST(TYPE) \
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extern TYPE data_##TYPE; \
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void r_##TYPE (TYPE x) { data_##TYPE = x; } \
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void s_##TYPE (void) { r_##TYPE (data_##TYPE); }
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TEST(V16QImode)
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TEST(V8HImode)
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TEST(V4SImode)
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TEST(V2DImode)
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TEST(V4SFmode)
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TEST(V2DFmode)
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TEST(V8QImode)
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TEST(V4HImode)
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TEST(V2SImode)
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TEST(V2SFmode)
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