From dccb154f149a2d99eb06fed4e2a32479f2d5174c Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Tue, 2 Oct 2012 19:37:24 +0000 Subject: [PATCH] mips.md (*baddu_si_eb, [...]): Merge into... gcc/ * config/mips/mips.md (*baddu_si_eb, *baddu_si_el): Merge into... (*baddu_si): ...this new pattern. From-SVN: r191997 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/mips.md | 19 ++++--------------- 2 files changed, 9 insertions(+), 15 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2bdf6618e76..46cdf7d21a0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-10-02 Richard Sandiford + + * config/mips/mips.md (*baddu_si_eb, *baddu_si_el): Merge into... + (*baddu_si): ...this new pattern. + 2012-10-02 Richard Sandiford * ira-int.h (target_ira_int): Add x_ira_useful_class_mode_regs. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 86d2c55c55d..787852c2ded 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -1293,23 +1293,12 @@ ;; Combiner patterns for unsigned byte-add. -(define_insn "*baddu_si_eb" +(define_insn "*baddu_si" [(set (match_operand:SI 0 "register_operand" "=d") (zero_extend:SI - (subreg:QI - (plus:SI (match_operand:SI 1 "register_operand" "d") - (match_operand:SI 2 "register_operand" "d")) 3)))] - "ISA_HAS_BADDU && BYTES_BIG_ENDIAN" - "baddu\\t%0,%1,%2" - [(set_attr "alu_type" "add")]) - -(define_insn "*baddu_si_el" - [(set (match_operand:SI 0 "register_operand" "=d") - (zero_extend:SI - (subreg:QI - (plus:SI (match_operand:SI 1 "register_operand" "d") - (match_operand:SI 2 "register_operand" "d")) 0)))] - "ISA_HAS_BADDU && !BYTES_BIG_ENDIAN" + (plus:QI (match_operand:QI 1 "register_operand" "d") + (match_operand:QI 2 "register_operand" "d"))))] + "ISA_HAS_BADDU" "baddu\\t%0,%1,%2" [(set_attr "alu_type" "add")])