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thumb2.md (*thumb2_addsi3_compare0): New. 

gcc/
	* config/arm/thumb2.md (*thumb2_addsi3_compare0): New.
	(*thumb2_addsi3_compare0_scratch): New.
	* config/arm/constraints.md (Pv): New.
	* config/arm/arm.md (*addsi3_compare0): Remove FIXME comment. Use
	for ARM mode only.
	(*addsi3_compare0_scratch): Likewise.

From-SVN: r159983
This commit is contained in:
Julian Brown 2010-05-28 16:07:33 +00:00 committed by Julian Brown
parent df24c2b88d
commit dcd8b2eea8
4 changed files with 67 additions and 4 deletions
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9
gcc/ChangeLog
View File

@ -1,3 +1,12 @@
2010-05-28 Julian Brown <julian@codesourcery.com>
* config/arm/thumb2.md (*thumb2_addsi3_compare0): New.
(*thumb2_addsi3_compare0_scratch): New.
* config/arm/constraints.md (Pv): New.
* config/arm/arm.md (*addsi3_compare0): Remove FIXME comment. Use
for ARM mode only.
(*addsi3_compare0_scratch): Likewise.
2010-05-28 Jan Hubicka <jh@suse.cz>
* ipa-reference.c (add_static_var): Remove redundant all_module_statics check.

5
gcc/config/arm/arm.md
View File

@ -693,7 +693,6 @@
""
)
;; ??? Make Thumb-2 variants which prefer low regs
(define_insn "*addsi3_compare0"
[(set (reg:CC_NOOV CC_REGNUM)
(compare:CC_NOOV
@ -702,7 +701,7 @@
(const_int 0)))
(set (match_operand:SI 0 "s_register_operand" "=r,r")
(plus:SI (match_dup 1) (match_dup 2)))]
"TARGET_32BIT"
"TARGET_ARM"
"@
add%.\\t%0, %1, %2
sub%.\\t%0, %1, #%n2"
@ -715,7 +714,7 @@
(plus:SI (match_operand:SI 0 "s_register_operand" "r, r")
(match_operand:SI 1 "arm_add_operand" "rI,L"))
(const_int 0)))]
"TARGET_32BIT"
"TARGET_ARM"
"@
cmn%?\\t%0, %1
cmp%?\\t%0, #%n1"

7
gcc/config/arm/constraints.md
View File

@ -31,7 +31,7 @@
;; The following multi-letter normal constraints have been used:
;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy
;; in Thumb-1 state: Pa, Pb
;; in Thumb-2 state: Ps, Pt, Pu
;; in Thumb-2 state: Ps, Pt, Pu, Pv
;; The following memory constraints have been used:
;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us
@ -163,6 +163,11 @@
(and (match_code "const_int")
(match_test "TARGET_THUMB2 && ival >= 1 && ival <= 8")))
(define_constraint "Pv"
"@internal In Thumb-2 state a constant in the range -255 to 0"
(and (match_code "const_int")
(match_test "TARGET_THUMB2 && ival >= -255 && ival <= 0")))
(define_constraint "G"
"In ARM/Thumb-2 state a valid FPA immediate constant."
(and (match_code "const_double")

50
gcc/config/arm/thumb2.md
View File

@ -1254,6 +1254,56 @@
(set_attr "length" "2")]
)
(define_insn "*thumb2_addsi3_compare0"
[(set (reg:CC_NOOV CC_REGNUM)
(compare:CC_NOOV
(plus:SI (match_operand:SI 1 "s_register_operand" "l, 0, r")
(match_operand:SI 2 "arm_add_operand" "lPt,Ps,rIL"))
(const_int 0)))
(set (match_operand:SI 0 "s_register_operand" "=l,l,r")
(plus:SI (match_dup 1) (match_dup 2)))]
"TARGET_THUMB2"
"*
HOST_WIDE_INT val;
if (GET_CODE (operands[2]) == CONST_INT)
val = INTVAL (operands[2]);
else
val = 0;
if (val < 0 && const_ok_for_arm (ARM_SIGN_EXTEND (-val)))
return \"subs\\t%0, %1, #%n2\";
else
return \"adds\\t%0, %1, %2\";
"
[(set_attr "conds" "set")
(set_attr "length" "2,2,4")]
)
(define_insn "*thumb2_addsi3_compare0_scratch"
[(set (reg:CC_NOOV CC_REGNUM)
(compare:CC_NOOV
(plus:SI (match_operand:SI 0 "s_register_operand" "l, r")
(match_operand:SI 1 "arm_add_operand" "lPv,rIL"))
(const_int 0)))]
"TARGET_THUMB2"
"*
HOST_WIDE_INT val;
if (GET_CODE (operands[1]) == CONST_INT)
val = INTVAL (operands[1]);
else
val = 0;
if (val < 0 && const_ok_for_arm (ARM_SIGN_EXTEND (-val)))
return \"cmp\\t%0, #%n1\";
else
return \"cmn\\t%0, %1\";
"
[(set_attr "conds" "set")
(set_attr "length" "2,4")]
)
;; 16-bit encodings of "muls" and "mul<c>". We only use these when
;; optimizing for size since "muls" is slow on all known
;; implementations and since "mul<c>" will be generated by