loop.c (emit_prefetch_instructions): Properly place the address computation.
* loop.c (emit_prefetch_instructions): Properly place the address computation. * dwarf2out.c (output_call_frame_info): Do not skip unwind info when flag_asynchronous_unwind_tables is set. * i386-protos.h (x86_output_mi_thunk): Declare. * unix.h (ASM_OUTPUT_MI_THUNK): Move offline to ... * i386.c (x86_output_mi_thunk): ... here; handle 64bits. * config/i386/i386.c (ix86_expand_int_movcc): Truncate to proper mode. * i386.md (movabsdi): Kill broken alternative. * i386.c (dbx64_register_map): Fix typo From-SVN: r54241
This commit is contained in:
Jan Hubicka
Jan Hubicka
parent
dbe15d12ec
commit
dd79d77593
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@ -1,3 +1,22 @@
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Tue Jun 4 13:09:18 CEST 2002 Jan Hubicka <jh@suse.cz>
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* loop.c (emit_prefetch_instructions): Properly place the address
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computation.
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* dwarf2out.c (output_call_frame_info): Do not skip unwind info
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when flag_asynchronous_unwind_tables is set.
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* i386-protos.h (x86_output_mi_thunk): Declare.
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* unix.h (ASM_OUTPUT_MI_THUNK): Move offline to ...
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* i386.c (x86_output_mi_thunk): ... here; handle 64bits.
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* config/i386/i386.c (ix86_expand_int_movcc): Truncate to proper
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mode.
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* i386.md (movabsdi): Kill broken alternative.
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* i386.c (dbx64_register_map): Fix typo
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2002-06-03 Jason Thorpe <thorpej@wasabisystems.com>
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* config/rs6000/netbsd.h (DRAFT_V4_STRUCT_RET): Remove.
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@ -194,4 +194,5 @@ extern tree ix86_handle_shared_attribute PARAMS ((tree *, tree, tree, int, bool
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extern unsigned int i386_pe_section_type_flags PARAMS ((tree, const char *,
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int));
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extern void i386_pe_asm_named_section PARAMS ((const char *, unsigned int));
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extern void x86_output_mi_thunk PARAMS ((FILE *, int, tree));
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#endif
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@ -457,7 +457,7 @@ static int const x86_64_int_return_registers[4] = {0 /*RAX*/, 1 /*RDI*/, 5, 4};
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int const dbx64_register_map[FIRST_PSEUDO_REGISTER] =
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{
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0, 1, 2, 3, 4, 5, 6, 7, /* general regs */
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33, 34, 35, 36, 37, 38, 39, 40 /* fp regs */
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33, 34, 35, 36, 37, 38, 39, 40, /* fp regs */
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-1, -1, -1, -1, -1, /* arg, flags, fpsr, dir, frame */
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17, 18, 19, 20, 21, 22, 23, 24, /* SSE */
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41, 42, 43, 44, 45, 46, 47, 48, /* MMX */
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@ -12494,3 +12494,78 @@ x86_order_regs_for_local_alloc ()
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while (pos < FIRST_PSEUDO_REGISTER)
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reg_alloc_order [pos++] = 0;
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}
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void
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x86_output_mi_thunk (file, delta, function)
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FILE *file;
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int delta;
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tree function;
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{
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tree parm;
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rtx xops[3];
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if (ix86_regparm > 0)
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parm = TYPE_ARG_TYPES (TREE_TYPE (function));
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else
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parm = NULL_TREE;
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for (; parm; parm = TREE_CHAIN (parm))
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if (TREE_VALUE (parm) == void_type_node)
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break;
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xops[0] = GEN_INT (delta);
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if (TARGET_64BIT)
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{
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int n = aggregate_value_p (TREE_TYPE (TREE_TYPE (function))) != 0;
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xops[1] = gen_rtx_REG (DImode, x86_64_int_parameter_registers[n]);
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output_asm_insn ("add{q} {%0, %1|%1, %0}", xops);
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if (flag_pic)
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{
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fprintf (file, "\tjmp *");
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assemble_name (file, XSTR (XEXP (DECL_RTL (function), 0), 0));
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fprintf (file, "@GOTPCREL(%%rip)\n");
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}
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else
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{
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fprintf (file, "\tjmp ");
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assemble_name (file, XSTR (XEXP (DECL_RTL (function), 0), 0));
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fprintf (file, "\n");
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}
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}
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else
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{
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if (parm)
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xops[1] = gen_rtx_REG (SImode, 0);
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else if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function))))
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xops[1] = gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx, 8));
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else
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xops[1] = gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx, 4));
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output_asm_insn ("add{l} {%0, %1|%1, %0}", xops);
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if (flag_pic)
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{
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xops[0] = pic_offset_table_rtx;
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xops[1] = gen_label_rtx ();
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xops[2] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
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if (ix86_regparm > 2)
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abort ();
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output_asm_insn ("push{l}\t%0", xops);
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output_asm_insn ("call\t%P1", xops);
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ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (xops[1]));
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output_asm_insn ("pop{l}\t%0", xops);
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output_asm_insn
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("add{l}\t{%2+[.-%P1], %0|%0, OFFSET FLAT: %2+[.-%P1]}", xops);
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xops[0] = gen_rtx_MEM (SImode, XEXP (DECL_RTL (function), 0));
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output_asm_insn
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("mov{l}\t{%0@GOT(%%ebx), %%ecx|%%ecx, %0@GOT[%%ebx]}", xops);
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asm_fprintf (file, "\tpop{l\t%%ebx|\t%%ebx}\n");
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asm_fprintf (file, "\tjmp\t{*%%ecx|%%ecx}\n");
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}
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else
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{
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fprintf (file, "\tjmp ");
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assemble_name (file, XSTR (XEXP (DECL_RTL (function), 0), 0));
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fprintf (file, "\n");
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}
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}
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}
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@ -2555,17 +2555,16 @@
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;; We fake an second form of instruction to force reload to load address
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;; into register when rax is not available
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(define_insn "*movabsdi_1_rex64"
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[(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r,r"))
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(match_operand:DI 1 "nonmemory_operand" "a,er,i"))]
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[(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
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(match_operand:DI 1 "nonmemory_operand" "a,er"))]
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"TARGET_64BIT"
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"@
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movabs{q}\t{%1, %P0|%P0, %1}
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mov{q}\t{%1, %a0|%a0, %1}
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movabs{q}\t{%1, %a0|%a0, %1}"
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mov{q}\t{%1, %a0|%a0, %1}"
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[(set_attr "type" "imov")
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(set_attr "modrm" "0,*,*")
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(set_attr "length_address" "8,0,0")
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(set_attr "length_immediate" "0,*,*")
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(set_attr "modrm" "0,*")
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(set_attr "length_address" "8,0")
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(set_attr "length_immediate" "0,*")
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(set_attr "memory" "store")
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(set_attr "mode" "DI")])
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@ -79,57 +79,5 @@ Boston, MA 02111-1307, USA. */
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/* Output code to add DELTA to the first argument, and then jump to FUNCTION.
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Used for C++ multiple inheritance. */
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#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
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do { \
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tree parm; \
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rtx xops[3]; \
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\
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if (ix86_regparm > 0) \
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parm = TYPE_ARG_TYPES (TREE_TYPE (function)); \
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else \
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parm = NULL_TREE; \
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for (; parm; parm = TREE_CHAIN (parm)) \
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if (TREE_VALUE (parm) == void_type_node) \
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break; \
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\
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xops[0] = GEN_INT (DELTA); \
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if (parm) \
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xops[1] = gen_rtx_REG (SImode, 0); \
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else if (aggregate_value_p (TREE_TYPE (TREE_TYPE (FUNCTION)))) \
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xops[1] = gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx, 8)); \
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else \
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xops[1] = gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx, 4)); \
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output_asm_insn ("add{l} {%0, %1|%1, %0}", xops); \
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\
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if (flag_pic && !TARGET_64BIT) \
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{ \
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xops[0] = pic_offset_table_rtx; \
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xops[1] = gen_label_rtx (); \
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xops[2] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_"); \
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\
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if (ix86_regparm > 2) \
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abort (); \
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output_asm_insn ("push{l}\t%0", xops); \
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output_asm_insn ("call\t%P1", xops); \
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ASM_OUTPUT_INTERNAL_LABEL (FILE, "L", CODE_LABEL_NUMBER (xops[1])); \
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output_asm_insn ("pop{l}\t%0", xops); \
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output_asm_insn ("add{l}\t{%2+[.-%P1], %0|%0, OFFSET FLAT: %2+[.-%P1]}", xops); \
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xops[0] = gen_rtx_MEM (SImode, XEXP (DECL_RTL (FUNCTION), 0)); \
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output_asm_insn ("mov{l}\t{%0@GOT(%%ebx), %%ecx|%%ecx, %0@GOT[%%ebx]}",\
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xops); \
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asm_fprintf (FILE, "\tpop{l\t%%ebx|\t%%ebx}\n"); \
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asm_fprintf (FILE, "\tjmp\t{*%%ecx|%%ecx}\n"); \
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} \
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else if (flag_pic && TARGET_64BIT) \
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{ \
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fprintf (FILE, "\tjmp *"); \
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assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
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fprintf (FILE, "@GOTPCREL(%%rip)\n"); \
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} \
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else \
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{ \
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fprintf (FILE, "\tjmp "); \
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assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
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fprintf (FILE, "\n"); \
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} \
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} while (0)
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#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
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x86_output_mi_thunk (FILE, DELTA, FUNCTION);
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@ -1943,7 +1943,8 @@ output_call_frame_info (for_eh)
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fde = &fde_table[i];
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/* Don't emit EH unwind info for leaf functions that don't need it. */
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if (for_eh && fde->nothrow && ! fde->uses_eh_lsda)
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if (!flag_asynchronous_unwind_tables && for_eh && fde->nothrow
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&& ! fde->uses_eh_lsda)
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continue;
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ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, FDE_LABEL, for_eh + i * 2);
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10
gcc/loop.c
10
gcc/loop.c
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@ -4039,6 +4039,7 @@ emit_prefetch_instructions (loop)
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int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
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rtx before_insn = info[i].giv->insn;
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rtx prev_insn = PREV_INSN (info[i].giv->insn);
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rtx seq;
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/* We can save some effort by offsetting the address on
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architectures with offsettable memory references. */
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@ -4053,14 +4054,17 @@ emit_prefetch_instructions (loop)
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loc = reg;
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}
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start_sequence ();
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/* Make sure the address operand is valid for prefetch. */
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if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
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(loc,
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insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
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loc = force_reg (Pmode, loc);
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emit_insn_before (gen_prefetch (loc, GEN_INT (info[i].write),
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GEN_INT (3)),
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before_insn);
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emit_insn (gen_prefetch (loc, GEN_INT (info[i].write),
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GEN_INT (3)));
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seq = gen_sequence ();
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end_sequence ();
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emit_insn_before (seq, before_insn);
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/* Check all insns emitted and record the new GIV
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information. */
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