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[PATCH AArch64 1/2] Correct signedness of builtins, remove casts from arm_neon.h 

* gcc/config/aarch64/aarch64-builtins.c
	(aarch64_types_binop_uus_qualifiers,
	aarch64_types_shift_to_unsigned_qualifiers,
	aarch64_types_unsigned_shiftacc_qualifiers): Define.
	* gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
	uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
	sqshlu_n, uqshl_n): Update qualifiers.
	* gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
	vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
	vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
	vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
	vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
	vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
	vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
	vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
	vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
	vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
	vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
	vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
	vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
	vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
	vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
	vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
	vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
	vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
	vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
	vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
	vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
	vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
	vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
	vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
	vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
	vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
	vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.

From-SVN: r211185
This commit is contained in:
Alan Lawrence 2014-06-03 14:57:22 +00:00 committed by Alan Lawrence
parent 878d361864
commit de10bcced9
4 changed files with 202 additions and 200 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
gcc/ChangeLog
View File

@ -1,3 +1,40 @@
2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
* gcc/config/aarch64/aarch64-builtins.c
(aarch64_types_binop_uus_qualifiers,
aarch64_types_shift_to_unsigned_qualifiers,
aarch64_types_unsigned_shiftacc_qualifiers): Define.
* gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
sqshlu_n, uqshl_n): Update qualifiers.
* gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
2014-06-03 Teresa Johnson <tejohnson@google.com>
* tree-sra.c (modify_function): Record caller nodes after rebuild.

16
gcc/config/aarch64/aarch64-builtins.c
View File

@ -177,6 +177,10 @@ aarch64_types_binopu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned };
#define TYPES_BINOPU (aarch64_types_binopu_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_binop_uus_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_unsigned, qualifier_none };
#define TYPES_BINOP_UUS (aarch64_types_binop_uus_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_binopp_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_poly, qualifier_poly, qualifier_poly };
#define TYPES_BINOPP (aarch64_types_binopp_qualifiers)
@ -203,9 +207,14 @@ aarch64_types_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
#define TYPES_GETLANE (aarch64_types_getlane_qualifiers)
#define TYPES_SHIFTIMM (aarch64_types_getlane_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_shift_to_unsigned_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_none, qualifier_immediate };
#define TYPES_SHIFTIMM_USS (aarch64_types_shift_to_unsigned_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_unsigned_shift_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_unsigned, qualifier_immediate };
#define TYPES_USHIFTIMM (aarch64_types_unsigned_shift_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_setlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_none, qualifier_none, qualifier_immediate };
@ -213,6 +222,13 @@ aarch64_types_setlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
#define TYPES_SHIFTINSERT (aarch64_types_setlane_qualifiers)
#define TYPES_SHIFTACC (aarch64_types_setlane_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_unsigned_shiftacc_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
qualifier_immediate };
#define TYPES_USHIFTACC (aarch64_types_unsigned_shiftacc_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_combine_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_none, qualifier_none };

26
gcc/config/aarch64/aarch64-simd-builtins.def
View File

@ -77,17 +77,17 @@
BUILTIN_VDQ_I (BINOP, dup_lane, 0)
/* Implemented by aarch64_<sur>q<r>shl<mode>. */
BUILTIN_VSDQ_I (BINOP, sqshl, 0)
BUILTIN_VSDQ_I (BINOP, uqshl, 0)
BUILTIN_VSDQ_I (BINOP_UUS, uqshl, 0)
BUILTIN_VSDQ_I (BINOP, sqrshl, 0)
BUILTIN_VSDQ_I (BINOP, uqrshl, 0)
BUILTIN_VSDQ_I (BINOP_UUS, uqrshl, 0)
/* Implemented by aarch64_<su_optab><optab><mode>. */
BUILTIN_VSDQ_I (BINOP, sqadd, 0)
BUILTIN_VSDQ_I (BINOP, uqadd, 0)
BUILTIN_VSDQ_I (BINOPU, uqadd, 0)
BUILTIN_VSDQ_I (BINOP, sqsub, 0)
BUILTIN_VSDQ_I (BINOP, uqsub, 0)
BUILTIN_VSDQ_I (BINOPU, uqsub, 0)
/* Implemented by aarch64_<sur>qadd<mode>. */
BUILTIN_VSDQ_I (BINOP, suqadd, 0)
BUILTIN_VSDQ_I (BINOP, usqadd, 0)
BUILTIN_VSDQ_I (BINOP_UUS, usqadd, 0)
/* Implemented by aarch64_get_dreg<VSTRUCT:mode><VDC:mode>. */
BUILTIN_VDC (GETLANE, get_dregoi, 0)
@ -214,9 +214,9 @@
BUILTIN_VSDQ_I_DI (SHIFTIMM, urshr_n, 0)
/* Implemented by aarch64_<sur>sra_n<mode>. */
BUILTIN_VSDQ_I_DI (SHIFTACC, ssra_n, 0)
BUILTIN_VSDQ_I_DI (SHIFTACC, usra_n, 0)
BUILTIN_VSDQ_I_DI (USHIFTACC, usra_n, 0)
BUILTIN_VSDQ_I_DI (SHIFTACC, srsra_n, 0)
BUILTIN_VSDQ_I_DI (SHIFTACC, ursra_n, 0)
BUILTIN_VSDQ_I_DI (USHIFTACC, ursra_n, 0)
/* Implemented by aarch64_<sur>shll_n<mode>. */
BUILTIN_VDW (SHIFTIMM, sshll_n, 0)
BUILTIN_VDW (SHIFTIMM, ushll_n, 0)
@ -227,18 +227,18 @@
BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrun_n, 0)
BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrun_n, 0)
BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrn_n, 0)
BUILTIN_VSQN_HSDI (SHIFTIMM, uqshrn_n, 0)
BUILTIN_VSQN_HSDI (USHIFTIMM, uqshrn_n, 0)
BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrn_n, 0)
BUILTIN_VSQN_HSDI (SHIFTIMM, uqrshrn_n, 0)
BUILTIN_VSQN_HSDI (USHIFTIMM, uqrshrn_n, 0)
/* Implemented by aarch64_<sur>s<lr>i_n<mode>. */
BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssri_n, 0)
BUILTIN_VSDQ_I_DI (SHIFTINSERT, usri_n, 0)
BUILTIN_VSDQ_I_DI (USHIFTACC, usri_n, 0)
BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssli_n, 0)
BUILTIN_VSDQ_I_DI (SHIFTINSERT, usli_n, 0)
BUILTIN_VSDQ_I_DI (USHIFTACC, usli_n, 0)
/* Implemented by aarch64_<sur>qshl<u>_n<mode>. */
BUILTIN_VSDQ_I (SHIFTIMM, sqshlu_n, 0)
BUILTIN_VSDQ_I (SHIFTIMM_USS, sqshlu_n, 0)
BUILTIN_VSDQ_I (SHIFTIMM, sqshl_n, 0)
BUILTIN_VSDQ_I (SHIFTIMM, uqshl_n, 0)
BUILTIN_VSDQ_I (USHIFTIMM, uqshl_n, 0)
/* Implemented by aarch64_cm<cmp><mode>. */
BUILTIN_VALLDI (BINOP, cmeq, 0)

323
gcc/config/aarch64/arm_neon.h
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