i386.md (floatunssisf2): Use ix86_expand_convert_uns_sisf_sse also for TARGET_SSE.

* config/i386/i386.md (floatunssisf2): Use
        ix86_expand_convert_uns_sisf_sse also for TARGET_SSE.
        (floatunssi<mode>2): Rename from floatunssisf2 and floatunssidf2.
        Macroize expander using MODEF mode iterator.

From-SVN: r132125
This commit is contained in:
Uros Bizjak 2008-02-05 19:07:25 +01:00
parent c1e7d24012
commit def7425b63
2 changed files with 14 additions and 17 deletions

View File

@ -1,10 +1,16 @@
2008-02-05 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (floatunssisf2): Use
ix86_expand_convert_uns_sisf_sse also for TARGET_SSE.
(floatunssi<mode>2): Rename from floatunssisf2 and floatunssidf2.
Macroize expander using MODEF mode iterator.
2008-02-05 Diego Novillo <dnovillo@google.com>
http://gcc.gnu.org/ml/gcc-patches/2008-02/msg00140.html
PR 33738
* tree-vrp.c (vrp_evaluate_conditional): Revert fix for
PR 33738.
* tree-vrp.c (vrp_evaluate_conditional): Revert fix for PR 33738.
2008-02-05 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>

View File

@ -5303,24 +5303,15 @@
DONE;
})
(define_expand "floatunssisf2"
[(use (match_operand:SF 0 "register_operand" ""))
(define_expand "floatunssi<mode>2"
[(use (match_operand:MODEF 0 "register_operand" ""))
(use (match_operand:SI 1 "nonimmediate_operand" ""))]
"!TARGET_64BIT && TARGET_SSE_MATH"
"!TARGET_64BIT && SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
{
if (TARGET_SSE2)
ix86_expand_convert_uns_sisf_sse (operands[0], operands[1]);
else
x86_emit_floatuns (operands);
ix86_expand_convert_uns_si<mode>_sse (operands[0], operands[1]);
DONE;
})
(define_expand "floatunssidf2"
[(use (match_operand:DF 0 "register_operand" ""))
(use (match_operand:SI 1 "nonimmediate_operand" ""))]
"!TARGET_64BIT && TARGET_SSE_MATH && TARGET_SSE2"
"ix86_expand_convert_uns_sidf_sse (operands[0], operands[1]); DONE;")
(define_expand "floatunsdisf2"
[(use (match_operand:SF 0 "register_operand" ""))
(use (match_operand:DI 1 "nonimmediate_operand" ""))]
@ -5330,8 +5321,8 @@
(define_expand "floatunsdidf2"
[(use (match_operand:DF 0 "register_operand" ""))
(use (match_operand:DI 1 "nonimmediate_operand" ""))]
"TARGET_SSE_MATH && TARGET_SSE2
&& (TARGET_64BIT || TARGET_KEEPS_VECTOR_ALIGNED_STACK)"
"(TARGET_64BIT || TARGET_KEEPS_VECTOR_ALIGNED_STACK)
&& TARGET_SSE2 && TARGET_SSE_MATH"
{
if (TARGET_64BIT)
x86_emit_floatuns (operands);