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@ -1,5 +1,7 @@
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2001-01-16 Jim Wilson <wilson@redhat.com>
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2001-01-16 Jim Wilson <wilson@redhat.com>
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* invoke.texi: Document IA-64 options.
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* config/ia64/ia64.c (ia64_print_operand_address): Delete 'B' support.
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* config/ia64/ia64.c (ia64_print_operand_address): Delete 'B' support.
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(fixup_errata): Delete TARGET_A_STEP use.
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(fixup_errata): Delete TARGET_A_STEP use.
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* config/ia64/ia64.h (MASK_A_STEP, TARGET_A_STEP): Delete.
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* config/ia64/ia64.h (MASK_A_STEP, TARGET_A_STEP): Delete.
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@ -559,6 +559,14 @@ in the following sections.
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-mno-callgraph-data -mslow-bytes -mno-slow-bytes -mno-lsim @gol
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-mno-callgraph-data -mslow-bytes -mno-slow-bytes -mno-lsim @gol
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-mlittle-endian -mbig-endian -m210 -m340 -mstack-increment}
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-mlittle-endian -mbig-endian -m210 -m340 -mstack-increment}
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@emph{IA-64 Options}
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@gccoptlist{
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-mbig-endian -mlittle-endian -mgnu-as -mgnu-ld -mno-pic @gol
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-mvolatile-asm-stop -mb-step -mregister-names -mno-sdata @gol
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-mconstant-gp -mauto-pic -minline-divide-min-latency @gol
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-minline-divide-max-throughput -mno-dwarf2-asm @gol
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-mfixed-range=@var{register range}}
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@item Code Generation Options
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@item Code Generation Options
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@xref{Code Gen Options,,Options for Code Generation Conventions}.
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@xref{Code Gen Options,,Options for Code Generation Conventions}.
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@gccoptlist{
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@gccoptlist{
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@ -4365,6 +4373,7 @@ that macro, which enables you to change the defaults.
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* NS32K Options::
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* NS32K Options::
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* AVR Options::
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* AVR Options::
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* MCore Options::
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* MCore Options::
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* IA-64 Options::
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* D30V Options::
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* D30V Options::
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@end menu
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@end menu
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@ -7696,6 +7705,77 @@ Generate code for a little endian target.
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Generate code for the 210 processor.
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Generate code for the 210 processor.
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@end table
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@end table
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@node IA-64 Options
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@subsection IA-64 Options
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@cindex IA-64 Options
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These are the @samp{-m} options defined for the Intel IA-64 architecture.
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@table @gcctabopt
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@item -mbig-endian
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Generate code for a big endian target. This is the default for HPUX.
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@item -mlittle-endian
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Generate code for a little endian target. This is the default for AIX5
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and Linux.
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@item -mgnu-as
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@itemx -mno-gnu-as
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Generate code for the GNU assembler. This is the default. Also, this is
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the default if the configure option @samp{--with-gnu-as} is used.
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@item -mgnu-ld
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@itemx -mno-gnu-ld
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Generate code for the GNU linker. This is the default. Also, this is the
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default if the configure option @samp{--with-gnu-ld} is used.
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@item -mno-pic
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Generate code that does not use a global pointer register.
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@item -mvolatile-asm-stop
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@itemx -mno-volatile-asm-stop
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Generate a stop bit immediately before and after volatile asm statements.
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@item -mb-step
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Generate code that works around Itanium B step errata.
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@item -mregister-names
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@itemx -mno-register-names
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Generate @samp{in}, @samp{loc}, and @samp{out} register names for the
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stacked registers.
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@item -mno-sdata
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@itemx -msdata
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Disable optimizations that use the small data section. This may be useful
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for working around optimizer bugs.
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@item -mconstant-gp
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Generate code that uses a single constant global pointer value. This is
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useful when compiling kernel code.
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@item -mauto-pic
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Generate code that is self-relocatable. This implies @samp{-mconstant-gp}.
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This is useful when compiling firmware code.
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@item -minline-divide-min-latency
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Generate code for inline divides using the minimum latency algorithm.
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@item -minline-divide-max-throughput
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Generate code for inline divides using the maximum throughput algorithm.
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@item -mno-dwarf2-asm
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@itemx -mdwarf2-asm
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Don't generate assembler code for the DWARF2 line number debugging info.
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This may be useful when not using the GNU assembler.
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@item -mfixed-range=@var{register range}
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Generate code treating the given register range as fixed registers.
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A fixed register is one that the register allocator can not use. This is
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useful when compiling kernel code. A register range is specified as
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two registers separated by a dash. Multiple register ranges can be
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specified separated by a comma.
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@end table
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@node D30V Options
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@node D30V Options
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@subsection D30V Options
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@subsection D30V Options
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@cindex D30V Options
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@cindex D30V Options
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