mips.h: Tweak various comments.
* config/mips/mips.h: Tweak various comments. * config/mips/mips.c: Likewise. From-SVN: r70360
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
e3f049a88e
commit
dfad12b55e
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@ -1,3 +1,8 @@
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2003-08-12 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.h: Tweak various comments.
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* config/mips/mips.c: Likewise.
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2003-08-11 James E Wilson <wilson@tuliptree.org>
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PR optimization/11319
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@ -1,4 +1,4 @@
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/* Subroutines for insn-output.c for MIPS
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/* Subroutines used for MIPS code generation.
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Copyright (C) 1989, 1990, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
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1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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Contributed by A. Lichnewsky, lich@inria.inria.fr.
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@ -310,8 +310,7 @@ struct mips_frame_info GTY(())
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struct machine_function GTY(()) {
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/* Pseudo-reg holding the address of the current function when
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generating embedded PIC code. Created by LEGITIMIZE_ADDRESS,
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used by mips_finalize_pic if it was created. */
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generating embedded PIC code. */
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rtx embedded_pic_fnaddr_rtx;
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/* Pseudo-reg holding the value of $28 in a mips16 function which
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@ -436,9 +435,7 @@ struct mips_integer_op {
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/* Global variables for machine-dependent things. */
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/* Threshold for data being put into the small data/bss area, instead
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of the normal data area (references to the small data/bss area take
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1 instruction, and use the global pointer, references to the normal
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data area takes 2 instructions). */
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of the normal data area. */
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int mips_section_threshold = -1;
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/* Count the number of .file directives, so that .loc is up to date. */
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@ -491,10 +488,10 @@ const struct mips_cpu_info *mips_arch_info;
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enum processor_type mips_tune;
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const struct mips_cpu_info *mips_tune_info;
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/* which instruction set architecture to use. */
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/* Which instruction set architecture to use. */
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int mips_isa;
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/* which abi to use. */
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/* Which ABI to use. */
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int mips_abi;
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/* Strings to hold which cpu and instruction set architecture to use. */
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@ -1320,8 +1317,7 @@ const_arith_operand (op, mode)
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}
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/* Return truth value of whether OP can be used as an operands
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where a 16 bit integer is needed */
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/* Return true if OP is a register operand or a signed 16-bit constant. */
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int
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arith_operand (op, mode)
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@ -1342,8 +1338,8 @@ small_int (op, mode)
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}
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/* Return truth value of whether OP is a register or the constant 0.
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In mips16 mode, we only accept a register, since the mips16 does
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not have $0. */
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Do not accept 0 in mips16 mode since $0 is not one of the core 8
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registers. */
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int
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reg_or_0_operand (op, mode)
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@ -1542,7 +1538,7 @@ consttable_operand (op, mode)
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return CONSTANT_P (op);
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}
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/* Returns 1 if OP is a symbolic operand, i.e. a symbol_ref or a label_ref,
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/* Return 1 if OP is a symbolic operand, i.e. a symbol_ref or a label_ref,
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possibly with an offset. */
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int
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@ -2058,7 +2054,7 @@ mips_legitimize_move (mode, dest, src)
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/* Convert GOT and GP-relative accesses back into their original form.
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Used by bothh TARGET_DELEGITIMIZE_ADDRESS and FIND_BASE_TERM. */
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Used by both TARGET_DELEGITIMIZE_ADDRESS and FIND_BASE_TERM. */
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rtx
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mips_delegitimize_address (x)
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@ -2318,8 +2314,8 @@ mips_rtx_costs (x, code, outer_code, total)
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*total = COSTS_N_INSNS (1);
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return true;
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}
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/* We can use cmpi for an xor with an unsigned 16 bit value. */
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/* We can use cmpi for an xor with an unsigned 16 bit value. */
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if ((outer_code) == XOR
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&& INTVAL (x) >= 0 && INTVAL (x) < 0x10000)
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{
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@ -3248,7 +3244,7 @@ gen_conditional_branch (operands, test_code)
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}
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/* Emit the common code for conditional moves. OPERANDS is the array
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of operands passed to the conditional move defined_expand. */
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of operands passed to the conditional move define_expand. */
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void
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gen_conditional_move (operands)
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@ -3334,8 +3330,8 @@ gen_conditional_move (operands)
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operands[2], operands[3])));
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}
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/* Emit the common code for conditional moves. OPERANDS is the array
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of operands passed to the conditional move defined_expand. */
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/* Emit a conditional trap. OPERANDS is the array of operands passed to
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the conditional_trap expander. */
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void
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mips_gen_conditional_trap (operands)
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@ -3379,7 +3375,7 @@ mips_gen_conditional_trap (operands)
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function, ARGS_SIZE is the size of the arguments and AUX is
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the value passed to us by mips_function_arg. SIBCALL_P is true
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if we are expanding a sibling call, false if we're expanding
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normal call. */
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a normal call. */
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void
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mips_expand_call (result, addr, args_size, aux, sibcall_p)
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@ -4473,11 +4469,11 @@ mips_va_arg (valist, type)
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TOP be the top of the register save area;
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OFF be the offset from TOP of the next register;
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ADDR_RTX be the address of the argument; and
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ADDR_RTX be the address of the argument;
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RSIZE be the number of bytes used to store the argument
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when it's in the register save area
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when it's in the register save area;
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OSIZE be the number of bytes used to store it when it's
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in the stack overflow area
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in the stack overflow area; and
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PADDING be (BYTES_BIG_ENDIAN ? OSIZE - RSIZE : 0)
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The code we want is:
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@ -5040,12 +5036,7 @@ override_options ()
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mips_dbx_regno[HI_REGNUM] = MD_DBX_FIRST + 0;
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mips_dbx_regno[LO_REGNUM] = MD_DBX_FIRST + 1;
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/* Set up array giving whether a given register can hold a given mode.
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At present, restrict ints from being in FP registers, because reload
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is a little enthusiastic about storing extra values in FP registers,
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and this is not good for things like OS kernels. Also, due to the
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mandatory delay, it is as fast to load from cached memory as to move
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from the FP register. */
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/* Set up array giving whether a given register can hold a given mode. */
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for (mode = VOIDmode;
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mode != MAX_MACHINE_MODE;
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@ -5249,31 +5240,11 @@ mips_debugger_offset (addr, offset)
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return offset;
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}
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/* A C compound statement to output to stdio stream STREAM the
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assembler syntax for an instruction operand X. X is an RTL
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expression.
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/* Implement the PRINT_OPERAND macro. The MIPS-specific operand codes are:
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CODE is a value that can be used to specify one of several ways
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of printing the operand. It is used when identical operands
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must be printed differently depending on the context. CODE
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comes from the `%' specification that was used to request
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printing of the operand. If the specification was just `%DIGIT'
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then CODE is 0; if the specification was `%LTR DIGIT' then CODE
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is the ASCII code for LTR.
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If X is a register, this macro should print the register's name.
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The names can be found in an array `reg_names' whose type is
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`char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
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When the machine description has a specification `%PUNCT' (a `%'
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followed by a punctuation character), this macro is called with
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a null pointer for X and the punctuation character for CODE.
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The MIPS specific codes are:
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'X' X is CONST_INT, prints 32 bits in hexadecimal format = "0x%08x",
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'x' X is CONST_INT, prints 16 bits in hexadecimal format = "0x%04x",
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'h' X is HIGH, prints %hi(X),
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'X' OP is CONST_INT, prints 32 bits in hexadecimal format = "0x%08x",
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'x' OP is CONST_INT, prints 16 bits in hexadecimal format = "0x%04x",
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'h' OP is HIGH, prints %hi(X),
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'd' output integer constant in decimal,
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'z' if the operand is 0, use $0 instead of normal operand.
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'D' print second part of double-word register or memory operand.
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@ -5283,13 +5254,16 @@ mips_debugger_offset (addr, offset)
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'F' print part of opcode for a floating-point branch condition.
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'N' print part of opcode for a branch condition, inverted.
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'W' print part of opcode for a floating-point branch condition, inverted.
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'S' X is CODE_LABEL, print with prefix of "LS" (for embedded switch).
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'S' OP is CODE_LABEL, print with prefix of "LS" (for embedded switch).
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'B' print 'z' for EQ, 'n' for NE
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'b' print 'n' for EQ, 'z' for NE
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'T' print 'f' for EQ, 't' for NE
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't' print 't' for EQ, 'f' for NE
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'Z' print register and a comma, but print nothing for $fcc0
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'R' print the reloc associated with LO_SUM
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The punctuation characters are:
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'(' Turn on .set noreorder
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')' Turn on .set reorder
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'[' Turn on .set noat
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@ -5911,13 +5885,7 @@ mips_output_ascii (stream, string_param, len)
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fprintf (stream, "\"\n");
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}
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/* Output at beginning of assembler file.
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If we are optimizing to use the global pointer, create a temporary file to
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hold all of the text stuff, and write it out to the end. This is needed
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because the MIPS assembler is evidently one pass, and if it hasn't seen the
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relevant .comm/.lcomm/.extern/.sdata declaration when the code is
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processed, it generates a two instruction sequence. */
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/* Implement TARGET_ASM_FILE_START. */
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static void
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mips_file_start ()
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@ -6007,10 +5975,8 @@ mips_output_aligned_bss (stream, decl, name, size, align)
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}
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#endif
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/* If we are optimizing the global pointer, emit the text section now and any
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small externs which did not have .comm, etc that are needed. Also, give a
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warning if the data area is more than 32K and -pic because 3 instructions
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are needed to reference the data pointers. */
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/* Implement TARGET_ASM_FILE_END. When using assembler macros, emit
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.externs for any small-data variables that turned out to be external. */
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static void
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mips_file_end ()
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@ -7827,11 +7793,10 @@ mips_encode_section_info (decl, rtl, first)
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default_encode_section_info (decl, rtl, first);
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}
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/* Return register to use for a function return value with VALTYPE for
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function FUNC. MODE is used instead of VALTYPE for LIBCALLs. */
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/* Implement FUNCTION_VALUE and LIBCALL_VALUE. For normal calls,
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VALTYPE is the return type and MODE is VOIDmode. For libcalls,
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VALTYPE is null and MODE is the mode of the return value. */
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rtx
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mips_function_value (valtype, func, mode)
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@ -9908,6 +9873,9 @@ mips_adjust_cost (insn, link, dep, cost)
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return cost;
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}
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/* Implement HARD_REGNO_NREGS. The size of FP registers are controlled
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by UNITS_PER_FPREG. All other registers are word sized. */
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unsigned int
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mips_hard_regno_nregs (regno, mode)
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int regno;
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@ -9919,15 +9887,16 @@ mips_hard_regno_nregs (regno, mode)
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return ((GET_MODE_SIZE (mode) + UNITS_PER_FPREG - 1) / UNITS_PER_FPREG);
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}
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/* Implement RETURN_IN_MEMORY. Under the old (i.e., 32 and O64 ABIs)
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all BLKmode objects are returned in memory. Under the new (N32 and
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64-bit MIPS ABIs) small structures are returned in a register.
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Objects with varying size must still be returned in memory, of
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course. */
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int
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mips_return_in_memory (type)
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tree type;
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{
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/* Under the old (i.e., 32 and O64 ABIs) all BLKmode objects are
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returned in memory. Under the new (N32 and 64-bit MIPS ABIs) small
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structures are returned in a register. Objects with varying size
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must still be returned in memory, of course. */
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if (mips_abi == ABI_32 || mips_abi == ABI_O64)
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return (TYPE_MODE (type) == BLKmode);
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else
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@ -925,21 +925,12 @@ extern const struct mips_cpu_info *mips_tune_info;
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two-instruction gap. */
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#define ISA_HAS_HILO_INTERLOCKS (TARGET_MIPS5500 || TARGET_SB1)
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/* Switch Recognition by gcc.c. Add -G xx support */
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/* Add -G xx support. */
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#undef SWITCH_TAKES_ARG
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#define SWITCH_TAKES_ARG(CHAR) \
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(DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
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/* Sometimes certain combinations of command options do not make sense
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on a particular target machine. You can define a macro
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`OVERRIDE_OPTIONS' to take account of this. This macro, if
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defined, is executed once just after all the command options have
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been parsed.
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On the MIPS, it is used to handle -G. We also use it to set up all
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of the tables referenced in the other macros. */
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#define OVERRIDE_OPTIONS override_options ()
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#define CONDITIONAL_REGISTER_USAGE mips_conditional_register_usage ()
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@ -1208,10 +1199,7 @@ extern const struct mips_cpu_info *mips_tune_info;
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/* How to renumber registers for dbx and gdb. */
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#define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ]
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/* The mapping from gcc register number to DWARF 2 CFA column number.
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This mapping does not allow for tracking register 0, since SGI's broken
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dwarf reader thinks column 0 is used for the frame address, but since
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register 0 is fixed this is not a problem. */
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/* The mapping from gcc register number to DWARF 2 CFA column number. */
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#define DWARF_FRAME_REGNUM(REG) \
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(REG == GP_REG_FIRST + 31 ? DWARF_FRAME_RETURN_COLUMN : REG)
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@ -1248,15 +1236,8 @@ extern const struct mips_cpu_info *mips_tune_info;
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/* Target machine storage layout */
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/* Define this if most significant bit is lowest numbered
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in instructions that operate on numbered bit-fields.
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*/
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#define BITS_BIG_ENDIAN 0
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/* Define this if most significant byte of a word is the lowest numbered. */
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#define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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/* Define this if most significant word of a multiword number is the lowest. */
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#define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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/* Define this to set the endianness to use in libgcc2.c, which can
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@ -1292,11 +1273,6 @@ extern const struct mips_cpu_info *mips_tune_info;
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/* The number of bytes in a double. */
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#define UNITS_PER_DOUBLE (TYPE_PRECISION (double_type_node) / BITS_PER_UNIT)
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/* A C expression for the size in bits of the type `int' on the
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target machine. If you don't define this, the default is one
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word. */
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#define INT_TYPE_SIZE (TARGET_INT64 ? 64 : 32)
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/* Tell the preprocessor the maximum size of wchar_t. */
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#ifndef MAX_WCHAR_TYPE_SIZE
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#ifndef WCHAR_TYPE_SIZE
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@ -1304,36 +1280,16 @@ extern const struct mips_cpu_info *mips_tune_info;
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#endif
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#endif
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/* A C expression for the size in bits of the type `short' on the
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target machine. If you don't define this, the default is half a
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word. (If this would be less than one storage unit, it is
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rounded up to one unit.) */
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/* Set the sizes of the core types. */
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#define SHORT_TYPE_SIZE 16
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/* A C expression for the size in bits of the type `long' on the
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target machine. If you don't define this, the default is one
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word. */
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#define INT_TYPE_SIZE (TARGET_INT64 ? 64 : 32)
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#define LONG_TYPE_SIZE (TARGET_LONG64 ? 64 : 32)
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#define MAX_LONG_TYPE_SIZE 64
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/* A C expression for the size in bits of the type `long long' on the
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target machine. If you don't define this, the default is two
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words. */
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#define LONG_LONG_TYPE_SIZE 64
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/* A C expression for the size in bits of the type `float' on the
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target machine. If you don't define this, the default is one
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word. */
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#define MAX_LONG_TYPE_SIZE 64
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#define FLOAT_TYPE_SIZE 32
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/* A C expression for the size in bits of the type `double' on the
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target machine. If you don't define this, the default is two
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words. */
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#define DOUBLE_TYPE_SIZE 64
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/* A C expression for the size in bits of the type `long double' on
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the target machine. If you don't define this, the default is two
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words. */
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#define LONG_DOUBLE_TYPE_SIZE \
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(mips_abi == ABI_N32 || mips_abi == ABI_64 ? 128 : 64)
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@ -1376,8 +1332,7 @@ extern const struct mips_cpu_info *mips_tune_info;
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/* There is no point aligning anything to a rounder boundary than this. */
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#define BIGGEST_ALIGNMENT LONG_DOUBLE_TYPE_SIZE
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/* Set this nonzero if move instructions will actually fail to work
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when given unaligned data. */
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/* All accesses must be aligned. */
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#define STRICT_ALIGNMENT 1
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/* Define this if you wish to imitate the way many other C compilers
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@ -1442,11 +1397,8 @@ extern const struct mips_cpu_info *mips_tune_info;
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#define PAD_VARARGS_DOWN (TARGET_64BIT ? BYTES_BIG_ENDIAN : !BYTES_BIG_ENDIAN)
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||||
/* Define this macro if an argument declared as `char' or `short' in a
|
||||
prototype should actually be passed as an `int'. In addition to
|
||||
avoiding errors in certain cases of mismatch, it also makes for
|
||||
better code on certain machines. */
|
||||
|
||||
/* Arguments declared as 'char' or 'short' in a prototype should be
|
||||
passed as 'int's. */
|
||||
#define PROMOTE_PROTOTYPES 1
|
||||
|
||||
/* Define if operations between registers always perform the operation
|
||||
|
|
@ -1493,26 +1445,22 @@ extern const struct mips_cpu_info *mips_tune_info;
|
|||
|
||||
/* Standard register usage. */
|
||||
|
||||
/* Number of actual hardware registers.
|
||||
The hardware registers are assigned numbers for the compiler
|
||||
from 0 to just below FIRST_PSEUDO_REGISTER.
|
||||
All registers that the compiler knows about must be given numbers,
|
||||
even those that are not normally considered general registers.
|
||||
/* Number of hardware registers. We have:
|
||||
|
||||
On the Mips, we have 32 integer registers, 32 floating point
|
||||
registers, 8 condition code registers, and the special registers
|
||||
hi and lo. After that we have 32 COP0 registers, 32 COP2 registers,
|
||||
and 32 COP3 registers. (COP1 is the floating-point processor.)
|
||||
The 8 condition code registers are only used if mips_isa >= 4. */
|
||||
- 32 integer registers
|
||||
- 32 floating point registers
|
||||
- 8 condition code registers
|
||||
- 2 accumulator registers (hi and lo)
|
||||
- 32 registers each for coprocessors 0, 2 and 3
|
||||
- 6 dummy entries that were used at various times in the past. */
|
||||
|
||||
#define FIRST_PSEUDO_REGISTER 176
|
||||
|
||||
/* 1 for registers that have pervasive standard uses
|
||||
and are not available for the register allocator.
|
||||
/* By default, fix the kernel registers ($26 and $27), the global
|
||||
pointer ($28) and the stack pointer ($29). This can change
|
||||
depending on the command-line options.
|
||||
|
||||
On the MIPS, see conventions, page D-2 */
|
||||
|
||||
/* Regarding coprocessor registers: without evidence to the contrary,
|
||||
Regarding coprocessor registers: without evidence to the contrary,
|
||||
it's best to assume that each coprocessor register has a unique
|
||||
use. This can be overridden, in, e.g., override_options() or
|
||||
CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
|
||||
|
|
@ -1537,8 +1485,10 @@ extern const struct mips_cpu_info *mips_tune_info;
|
|||
}
|
||||
|
||||
|
||||
/* Don't mark $31 as a call-clobbered register. The idea is that
|
||||
it's really the call instructions themselves which clobber $31.
|
||||
/* Set up this array for o32 by default.
|
||||
|
||||
Note that we don't mark $31 as a call-clobbered register. The idea is
|
||||
that it's really the call instructions themselves which clobber $31.
|
||||
We don't care what the called function does with it afterwards.
|
||||
|
||||
This approach makes it easier to implement sibcalls. Unlike normal
|
||||
|
|
@ -1564,14 +1514,8 @@ extern const struct mips_cpu_info *mips_tune_info;
|
|||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
|
||||
}
|
||||
|
||||
/* Like `CALL_USED_REGISTERS' but used to overcome a historical
|
||||
problem which makes CALL_USED_REGISTERS *always* include
|
||||
all the FIXED_REGISTERS. Until this problem has been
|
||||
resolved this macro can be used to overcome this situation.
|
||||
In particular, block_propagate() requires this list
|
||||
be accurate, or we can remove registers which should be live.
|
||||
This macro is used in regs_invalidated_by_call. */
|
||||
|
||||
/* Define this since $28, though fixed, is call-saved in many ABIs. */
|
||||
|
||||
#define CALL_REALLY_USED_REGISTERS \
|
||||
{ /* General registers. */ \
|
||||
|
|
@ -1636,8 +1580,8 @@ extern const struct mips_cpu_info *mips_tune_info;
|
|||
#define HI_REGNUM (MD_REG_FIRST + 0)
|
||||
#define LO_REGNUM (MD_REG_FIRST + 1)
|
||||
|
||||
/* FPSW_REGNUM is the single condition code used if mips_isa < 4. If
|
||||
mips_isa >= 4, it should not be used, and an arbitrary ST_REG
|
||||
/* FPSW_REGNUM is the single condition code used if !ISA_HAS_8CC.
|
||||
If ISA_HAS_8CC, it should not be used, and an arbitrary ST_REG
|
||||
should be used instead. */
|
||||
#define FPSW_REGNUM ST_REG_FIRST
|
||||
|
||||
|
|
@ -1668,24 +1612,10 @@ extern const struct mips_cpu_info *mips_tune_info;
|
|||
(COP0_REG_P (REGNO) ? '0' : COP2_REG_P (REGNO) ? '2' \
|
||||
: COP3_REG_P (REGNO) ? '3' : '?')
|
||||
|
||||
/* Return number of consecutive hard regs needed starting at reg REGNO
|
||||
to hold something of mode MODE.
|
||||
This is ordinarily the length in words of a value of mode MODE
|
||||
but can be less for certain modes in special long registers.
|
||||
|
||||
On the MIPS, all general registers are one word long. Except on
|
||||
the R4000 with the FR bit set, the floating point uses register
|
||||
pairs, with the second register not being allocable. */
|
||||
|
||||
#define HARD_REGNO_NREGS(REGNO, MODE) mips_hard_regno_nregs (REGNO, MODE)
|
||||
|
||||
/* Value is 1 if hard register REGNO can hold a value of machine-mode
|
||||
MODE. In 32 bit mode, require that DImode and DFmode be in even
|
||||
registers. For DImode, this makes some of the insns easier to
|
||||
write, since you don't have to worry about a DImode value in
|
||||
registers 3 & 4, producing a result in 4 & 5.
|
||||
|
||||
To make the code simpler HARD_REGNO_MODE_OK now just references an
|
||||
/* To make the code simpler, HARD_REGNO_MODE_OK just references an
|
||||
array built in override_options. Because machmodes.h is not yet
|
||||
included before this file is processed, the MODE bound can't be
|
||||
expressed here. */
|
||||
|
|
@ -1731,10 +1661,7 @@ extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
|
|||
/* Register in which static-chain is passed to a function. */
|
||||
#define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
|
||||
|
||||
/* If the structure value address is not passed in a register, define
|
||||
`STRUCT_VALUE' as an expression returning an RTX for the place
|
||||
where the address is passed. If it returns 0, the address is
|
||||
passed as an "invisible" first argument. */
|
||||
/* Pass structure addresses as an "invisible" first argument. */
|
||||
#define STRUCT_VALUE 0
|
||||
|
||||
/* Mips registers used in prologue/epilogue code when the stack frame
|
||||
|
|
@ -2179,13 +2106,6 @@ extern enum reg_class mips_char_to_class[256];
|
|||
+ (TARGET_ABICALLS && !TARGET_NEWABI \
|
||||
? MIPS_STACK_ALIGN (UNITS_PER_WORD) : 0))
|
||||
|
||||
/* The return address for the current frame is in r31 if this is a leaf
|
||||
function. Otherwise, it is on the stack. It is at a variable offset
|
||||
from sp/fp/ap, so we define a fake hard register rap which is a
|
||||
pointer to the return address on the stack. This always gets eliminated
|
||||
during reload to be either the frame pointer or the stack pointer plus
|
||||
an offset. */
|
||||
|
||||
#define RETURN_ADDR_RTX mips_return_addr
|
||||
|
||||
/* Since the mips16 ISA mode is encoded in the least-significant bit
|
||||
|
|
@ -2200,33 +2120,7 @@ extern enum reg_class mips_char_to_class[256];
|
|||
|
||||
#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_delta
|
||||
|
||||
/* If defined, this macro specifies a table of register pairs used to
|
||||
eliminate unneeded registers that point into the stack frame. If
|
||||
it is not defined, the only elimination attempted by the compiler
|
||||
is to replace references to the frame pointer with references to
|
||||
the stack pointer.
|
||||
|
||||
The definition of this macro is a list of structure
|
||||
initializations, each of which specifies an original and
|
||||
replacement register.
|
||||
|
||||
On some machines, the position of the argument pointer is not
|
||||
known until the compilation is completed. In such a case, a
|
||||
separate hard register must be used for the argument pointer.
|
||||
This register can be eliminated by replacing it with either the
|
||||
frame pointer or the argument pointer, depending on whether or not
|
||||
the frame pointer has been eliminated.
|
||||
|
||||
In this case, you might specify:
|
||||
#define ELIMINABLE_REGS \
|
||||
{{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
|
||||
{ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
|
||||
{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
|
||||
|
||||
Note that the elimination of the argument pointer with the stack
|
||||
pointer is specified first since that is the preferred elimination.
|
||||
|
||||
The eliminations to $17 are only used on the mips16. See the
|
||||
/* The eliminations to $17 are only used for mips16 code. See the
|
||||
definition of HARD_FRAME_POINTER_REGNUM. */
|
||||
|
||||
#define ELIMINABLE_REGS \
|
||||
|
|
@ -2237,82 +2131,37 @@ extern enum reg_class mips_char_to_class[256];
|
|||
{ FRAME_POINTER_REGNUM, GP_REG_FIRST + 30}, \
|
||||
{ FRAME_POINTER_REGNUM, GP_REG_FIRST + 17}}
|
||||
|
||||
/* A C expression that returns nonzero if the compiler is allowed to
|
||||
try to replace register number FROM-REG with register number
|
||||
TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
|
||||
defined, and will usually be the constant 1, since most of the
|
||||
cases preventing register elimination are things that the compiler
|
||||
already knows about.
|
||||
/* We can always eliminate to the hard frame pointer. We can eliminate
|
||||
to the stack pointer unless a frame pointer is needed.
|
||||
|
||||
When not in mips16 and mips64, we can always eliminate to the
|
||||
frame pointer. We can eliminate to the stack pointer unless
|
||||
a frame pointer is needed. In mips16 mode, we need a frame
|
||||
pointer for a large frame; otherwise, reload may be unable
|
||||
to compute the address of a local variable, since there is
|
||||
no way to add a large constant to the stack pointer
|
||||
In mips16 mode, we need a frame pointer for a large frame; otherwise,
|
||||
reload may be unable to compute the address of a local variable,
|
||||
since there is no way to add a large constant to the stack pointer
|
||||
without using a temporary register.
|
||||
|
||||
In mips16, for some instructions (eg lwu), we can't eliminate the
|
||||
Also, for some mips16 instructions (eg lwu), we can't eliminate the
|
||||
frame pointer for the stack pointer. These instructions are
|
||||
only generated in TARGET_64BIT mode.
|
||||
*/
|
||||
|
||||
only generated in TARGET_64BIT mode. */
|
||||
#define CAN_ELIMINATE(FROM, TO) \
|
||||
(((TO) == HARD_FRAME_POINTER_REGNUM \
|
||||
|| ((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed \
|
||||
&& ! (TARGET_MIPS16 && TARGET_64BIT) \
|
||||
&& (! TARGET_MIPS16 \
|
||||
|| compute_frame_size (get_frame_size ()) < 32768))))
|
||||
((TO) == HARD_FRAME_POINTER_REGNUM \
|
||||
|| ((TO) == STACK_POINTER_REGNUM && !frame_pointer_needed \
|
||||
&& !(TARGET_MIPS16 && TARGET_64BIT) \
|
||||
&& (!TARGET_MIPS16 \
|
||||
|| compute_frame_size (get_frame_size ()) < 32768)))
|
||||
|
||||
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
|
||||
(OFFSET) = mips_initial_elimination_offset ((FROM), (TO))
|
||||
(OFFSET) = mips_initial_elimination_offset ((FROM), (TO))
|
||||
|
||||
/* If defined, the maximum amount of space required for outgoing
|
||||
arguments will be computed and placed into the variable
|
||||
`current_function_outgoing_args_size'. No space will be pushed
|
||||
onto the stack for each call; instead, the function prologue
|
||||
should increase the stack frame size by this amount.
|
||||
|
||||
It is not proper to define both `PUSH_ROUNDING' and
|
||||
`ACCUMULATE_OUTGOING_ARGS'. */
|
||||
/* Allocate stack space for arguments at the beginning of each function. */
|
||||
#define ACCUMULATE_OUTGOING_ARGS 1
|
||||
|
||||
/* Offset from the argument pointer register to the first argument's
|
||||
address. On some machines it may depend on the data type of the
|
||||
function.
|
||||
|
||||
If `ARGS_GROW_DOWNWARD', this is the offset to the location above
|
||||
the first argument's address.
|
||||
|
||||
On the MIPS, we must skip the first argument position if we are
|
||||
returning a structure or a union, to account for its address being
|
||||
passed in $4. However, at the current time, this produces a compiler
|
||||
that can't bootstrap, so comment it out for now. */
|
||||
|
||||
#if 0
|
||||
#define FIRST_PARM_OFFSET(FNDECL) \
|
||||
(FNDECL != 0 \
|
||||
&& TREE_TYPE (FNDECL) != 0 \
|
||||
&& TREE_TYPE (TREE_TYPE (FNDECL)) != 0 \
|
||||
&& (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE \
|
||||
|| TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE) \
|
||||
? UNITS_PER_WORD \
|
||||
: 0)
|
||||
#else
|
||||
/* The argument pointer always points to the first argument. */
|
||||
#define FIRST_PARM_OFFSET(FNDECL) 0
|
||||
#endif
|
||||
|
||||
/* When a parameter is passed in a register, stack space is still
|
||||
allocated for it. For the MIPS, stack space must be allocated, cf
|
||||
Asm Lang Prog Guide page 7-8.
|
||||
|
||||
BEWARE that some space is also allocated for non existing arguments
|
||||
in register. In case an argument list is of form GF used registers
|
||||
are a0 (a2,a3), but we should push over a1... */
|
||||
|
||||
#define REG_PARM_STACK_SPACE(FNDECL) \
|
||||
((mips_abi == ABI_32 || mips_abi == ABI_O64) \
|
||||
? (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL) \
|
||||
/* o32 and o64 reserve stack space for all argument registers. */
|
||||
#define REG_PARM_STACK_SPACE(FNDECL) \
|
||||
((mips_abi == ABI_32 || mips_abi == ABI_O64) \
|
||||
? (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD) \
|
||||
: 0)
|
||||
|
||||
/* Define this if it is the responsibility of the caller to
|
||||
|
|
@ -2327,35 +2176,8 @@ extern enum reg_class mips_char_to_class[256];
|
|||
? 64 : 128)
|
||||
|
||||
|
||||
/* A C expression that should indicate the number of bytes of its
|
||||
own arguments that a function pops on returning, or 0
|
||||
if the function pops no arguments and the caller must therefore
|
||||
pop them all after the function returns.
|
||||
|
||||
FUNDECL is the declaration node of the function (as a tree).
|
||||
|
||||
FUNTYPE is a C variable whose value is a tree node that
|
||||
describes the function in question. Normally it is a node of
|
||||
type `FUNCTION_TYPE' that describes the data type of the function.
|
||||
From this it is possible to obtain the data types of the value
|
||||
and arguments (if known).
|
||||
|
||||
When a call to a library function is being considered, FUNTYPE
|
||||
will contain an identifier node for the library function. Thus,
|
||||
if you need to distinguish among various library functions, you
|
||||
can do so by their names. Note that "library function" in this
|
||||
context means a function used to perform arithmetic, whose name
|
||||
is known specially in the compiler and was not mentioned in the
|
||||
C code being compiled.
|
||||
|
||||
STACK-SIZE is the number of bytes of arguments passed on the
|
||||
stack. If a variable number of bytes is passed, it is zero, and
|
||||
argument popping will always be the responsibility of the
|
||||
calling function. */
|
||||
|
||||
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
|
||||
|
||||
|
||||
/* Symbolic macros for the registers used to return integer and floating
|
||||
point values. */
|
||||
|
||||
|
|
@ -2376,19 +2198,9 @@ extern enum reg_class mips_char_to_class[256];
|
|||
#define FP_ARG_FIRST (FP_REG_FIRST + 12)
|
||||
#define FP_ARG_LAST (FP_ARG_FIRST + MAX_ARGS_IN_REGISTERS - 1)
|
||||
|
||||
/* Define how to find the value returned by a library function
|
||||
assuming the value has mode MODE. Because we define
|
||||
PROMOTE_FUNCTION_RETURN, we must promote the mode just as
|
||||
PROMOTE_MODE does. */
|
||||
|
||||
#define LIBCALL_VALUE(MODE) \
|
||||
mips_function_value (NULL_TREE, NULL, (MODE))
|
||||
|
||||
/* Define how to find the value returned by a function.
|
||||
VALTYPE is the data type of the value (as a tree).
|
||||
If the precise function being called is known, FUNC is its FUNCTION_DECL;
|
||||
otherwise, FUNC is 0. */
|
||||
|
||||
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
||||
mips_function_value ((VALTYPE), (FUNC), VOIDmode)
|
||||
|
||||
|
|
@ -2410,26 +2222,7 @@ extern enum reg_class mips_char_to_class[256];
|
|||
&& ((N) % FP_INC == 0) && mips_abi != ABI_O64)) \
|
||||
&& !fixed_regs[N])
|
||||
|
||||
/* A C expression which can inhibit the returning of certain function
|
||||
values in registers, based on the type of value. A nonzero value says
|
||||
to return the function value in memory, just as large structures are
|
||||
always returned. Here TYPE will be a C expression of type
|
||||
`tree', representing the data type of the value.
|
||||
|
||||
Note that values of mode `BLKmode' must be explicitly
|
||||
handled by this macro. Also, the option `-fpcc-struct-return'
|
||||
takes effect regardless of this macro. On most systems, it is
|
||||
possible to leave the macro undefined; this causes a default
|
||||
definition to be used, whose value is the constant 1 for BLKmode
|
||||
values, and 0 otherwise.
|
||||
|
||||
GCC normally converts 1 byte structures into chars, 2 byte
|
||||
structs into shorts, and 4 byte structs into ints, and returns
|
||||
them this way. Defining the following macro overrides this,
|
||||
to give us MIPS cc compatibility. */
|
||||
|
||||
#define RETURN_IN_MEMORY(TYPE) \
|
||||
mips_return_in_memory (TYPE)
|
||||
#define RETURN_IN_MEMORY(TYPE) mips_return_in_memory (TYPE)
|
||||
|
||||
#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
|
||||
(PRETEND_SIZE) = mips_setup_incoming_varargs (&(CUM), (MODE), \
|
||||
|
|
@ -2437,19 +2230,12 @@ extern enum reg_class mips_char_to_class[256];
|
|||
|
||||
#define STRICT_ARGUMENT_NAMING (mips_abi != ABI_32 && mips_abi != ABI_O64)
|
||||
|
||||
/* Define a data type for recording info about an argument list
|
||||
during the scan of that argument list. This data type should
|
||||
hold all necessary information about the function itself
|
||||
and about the args processed so far, enough to enable macros
|
||||
such as FUNCTION_ARG to determine where the next arg should go.
|
||||
|
||||
This structure has to cope with two different argument allocation
|
||||
/* This structure has to cope with two different argument allocation
|
||||
schemes. Most MIPS ABIs view the arguments as a struct, of which the
|
||||
first N words go in registers and the rest go on the stack. If I < N,
|
||||
the Ith word might go in Ith integer argument register or the
|
||||
Ith floating-point one. In some cases, it has to go in both (see
|
||||
function_arg). For these ABIs, we only need to remember the number
|
||||
of words passed so far.
|
||||
Ith floating-point one. For these ABIs, we only need to remember
|
||||
the number of words passed so far.
|
||||
|
||||
The EABI instead allocates the integer and floating-point arguments
|
||||
separately. The first N words of FP arguments go in FP registers,
|
||||
|
|
|
|||
Loading…
Reference in New Issue