avr.c: Fix comment typos.
* config/avr/avr.c: Fix comment typos. * config/c4x/c4x.md: Likewise. * config/dsp16xx/dsp16xx.h: Likewise. * config/dsp16xx/dsp16xx.md: Likewise. * config/i386/i386.md: Likewise. * config/ia64/ia64.c: Likewise. * config/m32r/m32r.h: Likewise. * config/m68hc11/m68hc11.md: Likewise. * config/mmix/mmix.c: Likewise. * config/mn10200/mn10200.c: Likewise. * config/romp/romp.c: Likewise. * config/sh/sh.c: Likewise. * config/stormy16/stormy16.c: Likewise. * config/stormy16/stormy16.h: Likewise. * config/stormy16/stormy16.md: Likewise. From-SVN: r48496
This commit is contained in:
Kazu Hirata
Kazu Hirata
parent
fa4723baaf
commit
e03f5d43cb
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@ -1,3 +1,21 @@
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2002-01-03 Kazu Hirata <kazu@hxi.com>
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* config/avr/avr.c: Fix comment typos.
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* config/c4x/c4x.md: Likewise.
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* config/dsp16xx/dsp16xx.h: Likewise.
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* config/dsp16xx/dsp16xx.md: Likewise.
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* config/i386/i386.md: Likewise.
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* config/ia64/ia64.c: Likewise.
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* config/m32r/m32r.h: Likewise.
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* config/m68hc11/m68hc11.md: Likewise.
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* config/mmix/mmix.c: Likewise.
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* config/mn10200/mn10200.c: Likewise.
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* config/romp/romp.c: Likewise.
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* config/sh/sh.c: Likewise.
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* config/stormy16/stormy16.c: Likewise.
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* config/stormy16/stormy16.h: Likewise.
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* config/stormy16/stormy16.md: Likewise.
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2002-01-03 Graham Stott <grahams@redhat.com>
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* loop.h: Update copyright date.
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@ -1,5 +1,5 @@
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/* Subroutines for insn-output.c for ATMEL AVR micro controllers
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Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
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Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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Contributed by Denis Chertykov (denisc@overta.ru)
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This file is part of GNU CC.
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@ -4397,7 +4397,7 @@ _reg_unused_after (insn, reg)
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/* If this is a sequence, we must handle them all at once.
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We could have for instance a call that sets the target register,
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and a insn in a delay slot that uses the register. In this case,
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and an insn in a delay slot that uses the register. In this case,
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we must return 0. */
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else if (code == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
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{
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@ -1,6 +1,6 @@
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;; Machine description for the TMS320C[34]x for GNU C compiler
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;; Copyright (C) 1994, 1995, 1996, 1997, 1998,
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;; 1999, 2000 Free Software Foundation, Inc.
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;; 1999, 2000, 2002 Free Software Foundation, Inc.
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;; Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
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;; and Herman Ten Brugge (Haj.Ten.Brugge@net.HCC.nl)
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@ -5702,7 +5702,7 @@
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; BLOCK MOVE
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; We should probably get RC loaded when using RPTB automagically...
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; There's probably no need to call _memcpy() if we don't get
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; a immediate operand for the size. We could do a better job here
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; an immediate operand for the size. We could do a better job here
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; than most memcpy() implementations.
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; operand 2 is the number of bytes
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; operand 3 is the shared alignment
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@ -1,5 +1,5 @@
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/* Definitions of target machine for GNU compiler. AT&T DSP1600.
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Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001
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Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002
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Free Software Foundation, Inc.
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Contributed by Michael Collison (collison@isisinc.net).
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@ -501,7 +501,7 @@ extern int target_flags;
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#define REG_YBASE30 56
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#define REG_YBASE31 57
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/* Do we have a accumulator register? */
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/* Do we have an accumulator register? */
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#define IS_ACCUM_REG(REGNO) IN_RANGE ((REGNO), REG_A0, REG_A1L)
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#define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
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@ -1035,7 +1035,7 @@ enum reg_class
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'K' requires a constant 0 operand.
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'L' constant for use in add or sub from low 16-bits
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'M' 32-bit value -- low 16-bits zero
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'N' constant for use incrementing or decrementing a address register
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'N' constant for use incrementing or decrementing an address register
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'O' constant for use with and'ing only high 16-bit
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'P' constant for use with and'ing only low 16-bit
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*/
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@ -1,5 +1,6 @@
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;;- Machine description for the AT&T DSP1600 for GNU C compiler
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;; Copyright (C) 1994, 1995, 1997, 1998, 2001 Free Software Foundation, Inc.
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;; Copyright (C) 1994, 1995, 1997, 1998, 2001, 2002
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;; Free Software Foundation, Inc.
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;; Contributed by Michael Collison (collison@isisinc.net).
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;; This file is part of GNU CC.
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@ -1436,7 +1437,7 @@
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}")
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;; The movqi pattern with the parallel is used for addqi insns (which have a parallel)
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;; that are turned into moveqi insns by the flow phase. This happens when a auto-increment
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;; that are turned into moveqi insns by the flow phase. This happens when an auto-increment
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;; is detected.
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(define_insn "match_movqi1"
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@ -1,5 +1,5 @@
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;; GCC machine description for IA-32 and x86-64.
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;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
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;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
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;; Free Software Foundation, Inc.
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;; Mostly by William Schelter.
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;; x86_64 support added by Jan Hubicka
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@ -2113,7 +2113,7 @@
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(match_operand:QI 1 "general_operand" ""))]
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"! TARGET_PARTIAL_REG_STALL"
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{
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/* Don't generate memory->memory moves, go through a register */
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/* Don't generate memory->memory moves, go through a register. */
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
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operands[1] = force_reg (QImode, operands[1]);
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})
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@ -1,5 +1,5 @@
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/* Definitions of target machine for GNU compiler.
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Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
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Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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Contributed by James E. Wilson <wilson@cygnus.com> and
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David Mosberger <davidm@hpl.hp.com>.
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@ -4016,7 +4016,7 @@ ia64_safe_type (insn)
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WRITE_COUNT gets set to 2.
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The result of this is that whenever an insn attempts to write a register
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whose WRITE_COUNT is two, we need to issue a insn group barrier first.
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whose WRITE_COUNT is two, we need to issue an insn group barrier first.
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If a predicate register is written by a floating-point insn, we set
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WRITTEN_BY_FP to true.
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@ -1,5 +1,5 @@
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/* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu.
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Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001
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Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002
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Free Software Foundation, Inc.
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This file is part of GNU CC.
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@ -1388,7 +1388,7 @@ do { \
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&& RTX_OK_FOR_BASE_P (XEXP (X, 0)))
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/* Local to this file. */
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/* Is this a increment/decrement and store operation. */
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/* Is this an increment/decrement and store operation. */
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#define STORE_PREINC_PREDEC_P(MODE, X) \
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(((MODE) == SImode || (MODE) == SFmode) \
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&& (GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \
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@ -1,5 +1,5 @@
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;;- Machine description file for Motorola 68HC11 and 68HC12.
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;;- Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
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;;- Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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;;- Contributed by Stephane Carrez (stcarrez@worldnet.fr)
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;; This file is part of GNU CC.
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@ -1596,7 +1596,7 @@
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}
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else
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{
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/* X can be used as a indexed addressing in the source.
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/* X can be used as an indexed addressing in the source.
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Get the value before clearing it. */
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x_reg_used = reg_mentioned_p (ix_reg, operands[1]);
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if (x_reg_used)
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@ -2830,7 +2830,7 @@ mmix_gen_compare_reg (code, x, y)
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/* Local (static) helper functions. */
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/* Print operator suitable for doing something with a shiftable
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wyde. The type of operator is passed as a asm output modifier. */
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wyde. The type of operator is passed as an asm output modifier. */
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static void
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mmix_output_shiftvalue_op_from_str (stream, mainop, value)
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@ -1,5 +1,6 @@
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/* Subroutines for insn-output.c for Matsushita MN10200 series
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Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
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Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002
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Free Software Foundation, Inc.
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Contributed by Jeff Law (law@cygnus.com).
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This file is part of GNU CC.
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@ -615,7 +616,7 @@ expand_prologue ()
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}
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}
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/* Now see if we could load the value into a address register. */
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/* Now see if we could load the value into an address register. */
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if (zero_dreg == NULL_RTX
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&& areg_count > 2
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&& (!regs_ever_live[5] || !regs_ever_live[6]))
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@ -1,5 +1,5 @@
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/* Subroutines used for code generation on ROMP.
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Copyright (C) 1990, 1991, 1992, 1993, 1997, 1998, 1999, 2000
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Copyright (C) 1990, 1991, 1992, 1993, 1997, 1998, 1999, 2000, 2002
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Free Software Foundation, Inc.
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Contributed by Richard Kenner (kenner@nyu.edu)
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@ -1152,7 +1152,7 @@ romp_output_function_prologue (file, size)
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The last 6 bits of the first byte initialize the offset value. In many
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cases where procedures have small local storage, this is enough and, in
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this case, the high-order size field is zero so the byte can (almost) be
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used as is (see below). Thus, the byte value of 0x0d is encodes a offset
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used as is (see below). Thus, the byte value of 0x0d is encodes an offset
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size of 13 words, or 52 bytes.
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For procedures with a local space larger than 60 bytes, the 6 bits
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@ -2027,7 +2027,7 @@ romp_debugger_auto_correction(offset)
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}
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/* Return the offset value of an argument having
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the given offset. Basically, we correct by going from a arg pointer to
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the given offset. Basically, we correct by going from an arg pointer to
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stack pointer value. */
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int
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@ -1,5 +1,5 @@
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/* Output routines for GCC for Hitachi Super-H.
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Copyright (C) 1993, 1994, 1995, 1997, 1997, 1998, 1999, 2000, 2001
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Copyright (C) 1993, 1994, 1995, 1997, 1997, 1998, 1999, 2000, 2001, 2002
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Free Software Foundation, Inc.
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Contributed by Steve Chamberlain (sac@cygnus.com).
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Improved by Jim Wilson (wilson@cygnus.com).
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@ -5142,7 +5142,7 @@ reg_unused_after (reg, insn)
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/* If this is a sequence, we must handle them all at once.
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We could have for instance a call that sets the target register,
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and a insn in a delay slot that uses the register. In this case,
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and an insn in a delay slot that uses the register. In this case,
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we must return 0. */
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else if (code == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
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{
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@ -1,5 +1,6 @@
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/* Xstormy16 target functions.
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Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
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Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002
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Free Software Foundation, Inc.
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Contributed by Red Hat, Inc.
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This file is part of GNU CC.
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@ -440,7 +441,7 @@ xstormy16_output_cbranch_si (op, label, reversed, insn)
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registers can only be copied to memory and not to another class of
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registers. In that case, secondary reload registers are not needed and
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would not be helpful. Instead, a stack location must be used to perform the
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copy and the `movM' pattern should use memory as a intermediate storage.
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copy and the `movM' pattern should use memory as an intermediate storage.
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This case often occurs between floating-point and general registers. */
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enum reg_class
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@ -1015,7 +1016,7 @@ direct_return ()
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}
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/* Called after register allocation to add any instructions needed for
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the epilogue. Using a epilogue insn is favored compared to putting
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the epilogue. Using an epilogue insn is favored compared to putting
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all of the instructions in the TARGET_ASM_FUNCTION_PROLOGUE macro,
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since it allows the scheduler to intermix instructions with the
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saves of the caller saved registers. In some cases, it might be
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@ -1502,7 +1503,7 @@ xstormy16_print_operand_address (file, address)
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fputc (')', file);
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}
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/* Print an operand to a assembler instruction. */
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/* Print an operand to an assembler instruction. */
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void
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xstormy16_print_operand (file, x, code)
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FILE * file;
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@ -1,5 +1,5 @@
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/* Xstormy16 cpu description.
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Copyright (C) 1997, 1998, 1999, 2000, 2001
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Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002
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Free Software Foundation, Inc.
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Contributed by Red Hat, Inc.
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@ -1406,7 +1406,7 @@ enum reg_class
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registers can only be copied to memory and not to another class of
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registers. In that case, secondary reload registers are not needed and
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would not be helpful. Instead, a stack location must be used to perform the
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copy and the `movM' pattern should use memory as a intermediate storage.
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copy and the `movM' pattern should use memory as an intermediate storage.
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This case often occurs between floating-point and general registers. */
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/* This chip has the interesting property that only the first eight
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@ -1,5 +1,5 @@
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;; XSTORMY16 Machine description template
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;; Copyright (C) 1997, 1998, 1999, 2001 Free Software Foundation, Inc.
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;; Copyright (C) 1997, 1998, 1999, 2001, 2002 Free Software Foundation, Inc.
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;; Contributed by Red Hat, Inc.
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;; This file is part of GNU CC.
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@ -934,7 +934,7 @@
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}")
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;; Called after register allocation to add any instructions needed for
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;; the epilogue. Using a epilogue insn is favored compared to putting
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;; the epilogue. Using an epilogue insn is favored compared to putting
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;; all of the instructions in the TARGET_ASM_FUNCTION_EPILOGUE macro,
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;; since it allows the scheduler to intermix instructions with the
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;; restires of the caller saved registers. In some cases, it might be
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