[ARC] Avoid specific constants to end in limm field.
Avoid constants to end up in the limm field for particular instructions when compiling for size. gcc/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc.md (*add_n): Clean up pattern, update instruction constraints. (ashlsi3_insn): Update instruction constraints. (ashrsi3_insn): Likewise. (rotrsi3): Likewise. (add_shift): Likewise. * config/arc/constraints.md (Csz): New 32 bit constraint. It avoids placing in the limm field small constants which, otherwise, could end into a small instruction. testsuite/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * gcc.target/arc/tph_addx.c: New test. From-SVN: r264737
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Claudiu Zissulescu
Claudiu Zissulescu
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@ -1,3 +1,15 @@
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2018-10-01 Claudiu Zissulescu <claziss@synopsys.com>
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* config/arc/arc.md (*add_n): Clean up pattern, update instruction
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constraints.
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(ashlsi3_insn): Update instruction constraints.
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(ashrsi3_insn): Likewise.
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(rotrsi3): Likewise.
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(add_shift): Likewise.
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* config/arc/constraints.md (Csz): New 32 bit constraint. It
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avoids placing in the limm field small constants which, otherwise,
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could end into a small instruction.
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2018-10-01 Claudiu Zissulescu <claziss@synopsys.com>
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* config/arc/arc.md (maddsidi4_split): Don't use dmac if the
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@ -3173,30 +3173,17 @@ archs4x, archs4xd, archs4xd_slow"
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(set (match_dup 3) (match_dup 4))])
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(define_insn "*add_n"
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[(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,Rcw,W,W,w,w")
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(plus:SI (ashift:SI (match_operand:SI 1 "register_operand" "Rcqq,c,c,c,c,c")
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(match_operand:SI 2 "_1_2_3_operand" ""))
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(match_operand:SI 3 "nonmemory_operand" "0,0,c,?Cal,?c,??Cal")))]
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""
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"add%c2%? %0,%3,%1%&"
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[(set_attr "type" "shift")
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(set_attr "length" "*,4,4,8,4,8")
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(set_attr "predicable" "yes,yes,no,no,no,no")
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(set_attr "cond" "canuse,canuse,nocond,nocond,nocond,nocond")
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(set_attr "iscompact" "maybe,false,false,false,false,false")])
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(define_insn "*add_n"
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[(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,Rcw,W,W,w,w")
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(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "Rcqq,c,c,c,c,c")
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[(set (match_operand:SI 0 "dest_reg_operand" "=q,r,r")
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(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "q,r,r")
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(match_operand:SI 2 "_2_4_8_operand" ""))
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(match_operand:SI 3 "nonmemory_operand" "0,0,c,?Cal,?c,??Cal")))]
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(match_operand:SI 3 "nonmemory_operand" "0,r,Csz")))]
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""
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"add%z2%? %0,%3,%1%&"
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"add%z2%?\\t%0,%3,%1%&"
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[(set_attr "type" "shift")
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(set_attr "length" "*,4,4,8,4,8")
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(set_attr "predicable" "yes,yes,no,no,no,no")
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(set_attr "cond" "canuse,canuse,nocond,nocond,nocond,nocond")
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(set_attr "iscompact" "maybe,false,false,false,false,false")])
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(set_attr "length" "*,4,8")
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(set_attr "predicable" "yes,no,no")
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(set_attr "cond" "canuse,nocond,nocond")
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(set_attr "iscompact" "maybe,false,false")])
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;; N.B. sub[123] has the operands of the MINUS in the opposite order from
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;; what synth_mult likes.
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@ -3613,7 +3600,7 @@ archs4x, archs4xd, archs4xd_slow"
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; provide one alternatice for this, without condexec support.
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(define_insn "*ashlsi3_insn"
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[(set (match_operand:SI 0 "dest_reg_operand" "=Rcq,Rcqq,Rcqq,Rcw, w, w")
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(ashift:SI (match_operand:SI 1 "nonmemory_operand" "!0,Rcqq, 0, 0, c,cCal")
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(ashift:SI (match_operand:SI 1 "nonmemory_operand" "!0,Rcqq, 0, 0, c,cCsz")
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(match_operand:SI 2 "nonmemory_operand" "K, K,RcqqM, cL,cL,cCal")))]
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"TARGET_BARREL_SHIFTER
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&& (register_operand (operands[1], SImode)
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@ -3626,7 +3613,7 @@ archs4x, archs4xd, archs4xd_slow"
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(define_insn "*ashrsi3_insn"
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[(set (match_operand:SI 0 "dest_reg_operand" "=Rcq,Rcqq,Rcqq,Rcw, w, w")
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(ashiftrt:SI (match_operand:SI 1 "nonmemory_operand" "!0,Rcqq, 0, 0, c,cCal")
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(ashiftrt:SI (match_operand:SI 1 "nonmemory_operand" "!0,Rcqq, 0, 0, c,cCsz")
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(match_operand:SI 2 "nonmemory_operand" "K, K,RcqqM, cL,cL,cCal")))]
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"TARGET_BARREL_SHIFTER
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&& (register_operand (operands[1], SImode)
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@ -3653,7 +3640,7 @@ archs4x, archs4xd, archs4xd_slow"
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(define_insn "rotrsi3"
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[(set (match_operand:SI 0 "dest_reg_operand" "=Rcw, w, w")
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(rotatert:SI (match_operand:SI 1 "register_operand" " 0,cL,cCal")
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(rotatert:SI (match_operand:SI 1 "register_operand" " 0,cL,cCsz")
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(match_operand:SI 2 "nonmemory_operand" "cL,cL,cCal")))]
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"TARGET_BARREL_SHIFTER"
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"ror%? %0,%1,%2"
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@ -4494,16 +4481,16 @@ archs4x, archs4xd, archs4xd_slow"
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(define_peephole2
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[(set (match_operand:SI 0 "dest_reg_operand" "")
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(ashift:SI (match_operand:SI 1 "register_operand" "")
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(match_operand:SI 2 "const_int_operand" "")))
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(match_operand:SI 2 "_1_2_3_operand" "")))
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(set (match_operand:SI 3 "dest_reg_operand" "")
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(plus:SI (match_operand:SI 4 "nonmemory_operand" "")
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(match_operand:SI 5 "nonmemory_operand" "")))]
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"(INTVAL (operands[2]) == 1
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|| INTVAL (operands[2]) == 2
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|| INTVAL (operands[2]) == 3)
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&& (true_regnum (operands[4]) == true_regnum (operands[0])
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"(true_regnum (operands[4]) == true_regnum (operands[0])
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|| true_regnum (operands[5]) == true_regnum (operands[0]))
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&& (peep2_reg_dead_p (2, operands[0]) || (true_regnum (operands[3]) == true_regnum (operands[0])))"
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&& (peep2_reg_dead_p (2, operands[0])
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|| (true_regnum (operands[3]) == true_regnum (operands[0])))
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&& !(optimize_size && satisfies_constraint_I (operands[4]))
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&& !(optimize_size && satisfies_constraint_I (operands[5]))"
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;; the preparation statements take care to put proper operand in operands[4]
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;; operands[4] will always contain the correct operand. This is added to satisfy commutativity
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[(set (match_dup 3)
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@ -6560,7 +6547,7 @@ archs4x, archs4xd, archs4xd_slow"
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[(set (match_operand:SI 0 "register_operand" "=q,r,r")
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(plus:SI (ashift:SI (match_operand:SI 1 "register_operand" "q,r,r")
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(match_operand:SI 2 "_1_2_3_operand" ""))
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(match_operand:SI 3 "nonmemory_operand" "0,r,Cal")))]
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(match_operand:SI 3 "nonmemory_operand" "0,r,Csz")))]
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""
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"add%2%?\\t%0,%3,%1"
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[(set_attr "length" "*,4,8")
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@ -435,6 +435,12 @@
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&& !arc_legitimate_pic_addr_p (op)
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&& !satisfies_constraint_I (op)"))
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(define_constraint "Csz"
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"a 32 bit constant avoided when compiling for size."
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(match_test "immediate_operand (op, VOIDmode)
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&& !arc_legitimate_pic_addr_p (op)
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&& !(satisfies_constraint_I (op) && optimize_size)"))
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; Note that the 'cryptic' register constraints will not make reload use the
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; associated class to reload into, but this will not penalize reloading of any
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; other operands, or using an alternate part of the same alternative.
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@ -1,3 +1,7 @@
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2018-10-01 Claudiu Zissulescu <claziss@synopsys.com>
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* gcc.target/arc/tph_addx.c: New test.
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2018-10-01 Claudiu Zissulescu <claziss@synopsys.com>
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* gcc.target/arc/tmac-3.c: New file.
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53
gcc/testsuite/gcc.target/arc/tph_addx.c
Normal file
53
gcc/testsuite/gcc.target/arc/tph_addx.c
Normal file
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/* { dg-do compile } */
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/* { dg-options "-Os" } */
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/* when compiling for size avoid the following peephole
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-------------------------------------------------------------
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Pattern 1 : r0 = r1 << {i}
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r3 = r4/INT + r0 ;;and commutative
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||
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\/
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add{i} r3,r4/INT,r1
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-------------------------------------------------------------
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*/
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typedef int a;
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typedef int b ;
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struct c
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{
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b d;
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};
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struct e
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{
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a f;
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};
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int g(int family)
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{
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switch (family)
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case 2:
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return sizeof(struct e);
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return 0;
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}
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int h(int family)
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{
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return 1 + g(family) - 1 ;
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}
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extern void m (void);
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int i(int j)
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{
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struct c *hdr;
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int k;
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int l;
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k = h(j);
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l = sizeof(struct c) + k * 2;
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hdr->d = l ;
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if (j)
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m();
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}
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/* { dg-final { scan-assembler-not "add\d" } } */
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